Built-in self-test of FPGA interconnect

C Stroud, S Wijesuriya, C Hamilton… - … 1998 (IEEE Cat. No …, 1998 - ieeexplore.ieee.org
We introduce the first BIST approach for testing the programmable routing network in
FPGAs. Our method detects opens in, and shorts among, wiring segments, and also faults …

BIST-based test and diagnosis of FPGA logic blocks

M Abramovici, CE Stroud - IEEE Transactions on Very Large …, 2001 - ieeexplore.ieee.org
We present a built-in self-test (BIST) approach able to detect and accurately diagnose all
single and practically all multiple faulty programmable logic blocks (PLBs) in field …

[图书][B] Bio-inspired computing machines: Towards novel computational architectures

D Mange, M Tomassini - 1998 - books.google.com
Ever since his days as a cave-dweller, Man has been awe-stricken by the workings of
Nature. The rise of modern science over the past few centuries, continuously striving to …

BIST-based diagnostics of FPGA logic blocks

C Stroud, E Lee, M Abramovici - Proceedings International Test …, 1997 - ieeexplore.ieee.org
Accurate diagnosis is an essential requirement in many testing environments, since it is the
basis for any repair or replacement strategy used for chip or system fault-tolerance. In this …

Testing configurable LUT-based FPGA's

WK Huang, FJ Meyer, XT Chen… - IEEE Transactions on …, 1998 - ieeexplore.ieee.org
We present a new technique for testing field programmable gate arrays (FPGA's) based on
look-up tables (LUT's). We consider a generalized structure for the basic FPGA logic …

Online BIST and BIST-based diagnosis of FPGA logic blocks

M Abramovici, CE Stroud… - IEEE Transactions on Very …, 2004 - ieeexplore.ieee.org
We present the first online built-in self-test (BIST) and BIST-based diagnosis of
programmable logic resources in field-programmable gate arrays (FPGAs). These …

Detecting, diagnosing, and tolerating faults in SRAM-based field programmable gate arrays: a survey

A Doumar, H Ito - IEEE Transactions on Very Large Scale …, 2003 - ieeexplore.ieee.org
Topics related to the faults in SRAM-based field programmable gate arrays (FPGAs) have
been intensively studied in recent research studies. These topics include FPGA fault …

Method and apparatus for testing field programmable gate arrays

M Abramovici, CE Stroud, SS Wijesuriya - US Patent 6,202,182, 2001 - Google Patents
A method of built-in self-testing field programmable gate arrays (FPGAs) including the
programmable logic blocks, the programmable routing networks and the programmable …

Finding hard-to-find data plane bugs with a PTA

P Bressana, N Zilberman, R Soulé - Proceedings of the 16th International …, 2020 - dl.acm.org
Bugs in network hardware can cause tremendous problems. However, programmable
network devices have the potential to provide greater visibility into the internal behavior of …

Methods for delay-fault testing in field-programmable gate arrays

CE Stroud, M Abramovici - US Patent 7,412,343, 2008 - Google Patents
Abstract Systems and methods for delay-fault testing field programmable gate arrays
(FPGA's), applicable both for off-line manufacturing and system-level testing, as well as for …