A speed area optimized embedded co-processor for McEliece cryptosystem

S Ghosh, J Delvaux, L Uhsadel… - 2012 IEEE 23rd …, 2012 - ieeexplore.ieee.org
This paper describes the systematic design methods of an embedded co-processor for a
post quantum secure McEliece cryptosystem. A hardware/software co-design has been …