Analytical surface potential modeling and simulation of junction-less double gate (JLDG) MOSFET for ultra low-power analog/RF circuits

NC Roy, A Gupta, S Rai - Microelectronics Journal, 2015 - Elsevier
In this paper, a simple structure for short channel junction-less double gate (JLDG) MOSFET
is proposed. Further expression for surface potential of JLDG has been derived using 2D …

Analysis and simulation of a junctionless double gate MOSFET for high-speed applications

R Hosseini - Journal of the Korean Physical Society, 2015 - Springer
In this paper, the electrical characteristics of a junctionless double-gate metal-oxide-
semiconductor field-effect-transistor (JL DG MOSFET) and that of inversion-mode double …

Analytical models for threshold voltage, drain induced barrier lowering effect of junctionless triple-gate FinFETs

G Hu, S Hu, J Feng, R Liu, L Wang… - 2015 IEEE 11th …, 2015 - ieeexplore.ieee.org
Analytical models for threshold voltage, and drain induced barrier lowering effect of the short-
channel fin-shaped field-effect transistor (FinFET) are obtained. The analytical model results …