Ambit: In-memory accelerator for bulk bitwise operations using commodity DRAM technology
Many important applications trigger bulk bitwise operations, ie, bitwise operations on large
bit vectors. In fact, recent works design techniques that exploit fast bulk bitwise operations to …
bit vectors. In fact, recent works design techniques that exploit fast bulk bitwise operations to …
Error characterization, mitigation, and recovery in flash-memory-based solid-state drives
NAND flash memory is ubiquitous in everyday life today because its capacity has
continuously increased and cost has continuously decreased over decades. This positive …
continuously increased and cost has continuously decreased over decades. This positive …
Understanding reduced-voltage operation in modern DRAM devices: Experimental characterization, analysis, and mechanisms
The energy consumption of DRAM is a critical concern in modern computing systems.
Improvements in manufacturing process technology have allowed DRAM vendors to lower …
Improvements in manufacturing process technology have allowed DRAM vendors to lower …
The RowHammer problem and other issues we may face as memory becomes denser
O Mutlu - Design, Automation & Test in Europe Conference & …, 2017 - ieeexplore.ieee.org
As memory scales down to smaller technology nodes, new failure mechanisms emerge that
threaten its correct operation. If such failure mechanisms are not anticipated and corrected …
threaten its correct operation. If such failure mechanisms are not anticipated and corrected …
The reach profiler (reaper) enabling the mitigation of dram retention failures via profiling at aggressive conditions
Modern DRAM-based systems suffer from significant energy and latency penalties due to
conservative DRAM refresh standards. Volatile DRAM cells can retain information across a …
conservative DRAM refresh standards. Volatile DRAM cells can retain information across a …
Design-induced latency variation in modern DRAM chips: Characterization, analysis, and latency reduction mechanisms
Variation has been shown to exist across the cells within a modern DRAM chip. Prior work
has studied and exploited several forms of variation, such as manufacturing-process-or …
has studied and exploited several forms of variation, such as manufacturing-process-or …
SoftMC: A flexible and practical open-source infrastructure for enabling experimental DRAM studies
DRAM is the primary technology used for main memory in modern systems. Unfortunately,
as DRAM scales down to smaller technology nodes, it faces key challenges in both data …
as DRAM scales down to smaller technology nodes, it faces key challenges in both data …
Detecting and mitigating data-dependent DRAM failures by exploiting current memory content
DRAM cells in close proximity can fail depending on the data content in neighboring cells.
These failures are called data-dependent failures. Detecting and mitigating these failures …
These failures are called data-dependent failures. Detecting and mitigating these failures …
Utility-based hybrid memory management
While the memory footprints of cloud and HPC applications continue to increase,
fundamental issues with DRAM scaling are likely to prevent traditional main memory …
fundamental issues with DRAM scaling are likely to prevent traditional main memory …
Concurrent data structures for near-memory computing
The performance gap between memory and CPU has grown exponentially. To bridge this
gap, hardware architects have proposed near-memory computing (also called processing-in …
gap, hardware architects have proposed near-memory computing (also called processing-in …