Processing data where it makes sense: Enabling in-memory computation

O Mutlu, S Ghose, J Gómez-Luna… - Microprocessors and …, 2019 - Elsevier
Today's systems are overwhelmingly designed to move data to computation. This design
choice goes directly against at least three key trends in systems that cause performance …

Rowhammer: A retrospective

O Mutlu, JS Kim - … Transactions on Computer-Aided Design of …, 2019 - ieeexplore.ieee.org
This retrospective paper describes the RowHammer problem in dynamic random access
memory (DRAM), which was initially introduced by Kim et al. at the ISCA 2014 Conference …

Processing-in-memory: A workload-driven perspective

S Ghose, A Boroumand, JS Kim… - IBM Journal of …, 2019 - ieeexplore.ieee.org
Many modern and emerging applications must process increasingly large volumes of data.
Unfortunately, prevalent computing paradigms are not designed to efficiently handle such …

EDEN: Enabling energy-efficient, high-performance deep neural network inference using approximate DRAM

S Koppula, L Orosa, AG Yağlıkçı, R Azizi… - Proceedings of the …, 2019 - dl.acm.org
The effectiveness of deep neural networks (DNN) in vision, speech, and language
processing has prompted a tremendous demand for energy-efficient high-performance DNN …

D-RaNGe: Using commodity DRAM devices to generate true random numbers with low latency and high throughput

JS Kim, M Patel, H Hassan, L Orosa… - 2019 IEEE International …, 2019 - ieeexplore.ieee.org
We propose a new DRAM-based true random number generator (TRNG) that leverages
DRAM cells as an entropy source. The key idea is to intentionally violate the DRAM access …

Demystifying complex workload-DRAM interactions: An experimental study

S Ghose, T Li, N Hajinazar, DS Cali… - Proceedings of the ACM on …, 2019 - dl.acm.org
It has become increasingly difficult to understand the complex interactions between modern
applications and main memory, composed of Dynamic Random Access Memory (DRAM) …

In-DRAM bulk bitwise execution engine

V Seshadri, O Mutlu - arXiv preprint arXiv:1905.09822, 2019 - arxiv.org
Many applications heavily use bitwise operations on large bitvectors as part of their
computation. In existing systems, performing such bulk bitwise operations requires the …

Crow: A low-cost substrate for improving dram performance, energy efficiency, and reliability

H Hassan, M Patel, JS Kim, AG Yaglikci… - Proceedings of the 46th …, 2019 - dl.acm.org
DRAM has been the dominant technology for architecting main memory for decades. Recent
trends in multi-core system design and large-dataset applications have amplified the role of …

Understanding and modeling on-die error correction in modern DRAM: An experimental study using real devices

M Patel, JS Kim, H Hassan… - 2019 49th Annual IEEE …, 2019 - ieeexplore.ieee.org
Experimental characterization of DRAM errors is a powerful technique for understanding
DRAM behavior and provides valuable insights for improving overall system performance …

Dspatch: Dual spatial pattern prefetcher

R Bera, AV Nori, O Mutlu, S Subramoney - … of the 52nd Annual IEEE/ACM …, 2019 - dl.acm.org
High main memory latency continues to limit performance of modern high-performance out-
of-order cores. While DRAM latency has remained nearly the same over many generations …