State of the art and future perspectives in advanced CMOS technology
The international technology roadmap of semiconductors (ITRS) is approaching the
historical end point and we observe that the semiconductor industry is driving …
historical end point and we observe that the semiconductor industry is driving …
A new technique for evaluating stacked nanosheet inner spacer TDDB reliability
T Shen, K Watanabe, H Zhou… - 2020 IEEE …, 2020 - ieeexplore.ieee.org
For stacked Nanosheet gate-all-around transistors, a new failure mode between the gate
and epitaxial source/drain (PC-Epi) is introduced in the Middle-Of-Line (MOL) intermetal …
and epitaxial source/drain (PC-Epi) is introduced in the Middle-Of-Line (MOL) intermetal …
Development of SiGe indentation process control to enable stacked Nanosheet FET technology
The methodology of measuring the lateral etch, or indentation, of SiGe nanosheets by using
optical scatterometry, x-ray fluorescence, and machine learning algorithms is presented and …
optical scatterometry, x-ray fluorescence, and machine learning algorithms is presented and …
AFM characterization for gate-all-around (GAA) devices
As development of stacked Nanosheet Gate All-Around (GAA) transistor continues as the
candidate technology for future nodes, several key process points remain difficult to …
candidate technology for future nodes, several key process points remain difficult to …