FPGA-based multi-level approximate multipliers for high-performance error-resilient applications

N Van Toan, JG Lee - IEEE Access, 2020 - ieeexplore.ieee.org
This paper presents approximate multipliers which are efficiently deployed on Field
Programmable Gate Arrays (FPGAs) by using newly proposed approximate logic …

Area-optimized accurate and approximate softcore signed multiplier architectures

S Ullah, H Schmidl, SS Sahoo… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Multiplication is one of the most extensively used arithmetic operations in a wide range of
applications. In order to provide resource-efficient and high-performance multipliers …

Approxfpgas: Embracing asic-based approximate arithmetic components for fpga-based systems

BS Prabakaran, V Mrazek, Z Vasicek… - 2020 57th ACM/IEEE …, 2020 - ieeexplore.ieee.org
There has been abundant research on the development of Approximate Circuits (ACs) for
ASICs. However, previous studies have illustrated that ASIC-based ACs offer asymmetrical …

Approximate radix-8 booth multiplier for low power and high speed applications

B Boro, KM Reddy, YBN Kumar, MH Vasantha - Microelectronics Journal, 2020 - Elsevier
Approximate computing is an emerging circuit design technique which reduce the energy
consumption with acceptable degradation in accuracy. Three approximate radix-8 Booth …

Energy-efficient low-latency signed multiplier for FPGA-based hardware accelerators

S Ullah, TDA Nguyen, A Kumar - IEEE Embedded Systems …, 2020 - ieeexplore.ieee.org
Multiplication is one of the most extensively used arithmetic operations in a wide range of
applications, such as multimedia processing and artificial neural networks. For such …

LeAp: Leading-one detection-based softcore approximate multipliers with tunable accuracy

Z Ebrahimi, S Ullah, A Kumar - 2020 25th Asia and South …, 2020 - ieeexplore.ieee.org
Approximate multipliers are ubiquitously used in diverse applications by exploiting circuit
simplification, mainly specialized for Application-Specific Integrated Circuit (ASIC) platforms …

Small-area and low-power FPGA-based multipliers using approximate elementary modules

Y Guo, H Sun, S Kimura - 2020 25th Asia and South Pacific …, 2020 - ieeexplore.ieee.org
Approximate multiplier design is an effective technique to improve hardware performance at
the cost of accuracy loss. The current approximate multipliers are mostly ASIC-based and …

CAxCNN: Towards the use of canonic sign digit based approximation for hardware-friendly convolutional neural networks

M Riaz, R Hafiz, SA Khaliq, M Faisal, HT Iqbal… - IEEE …, 2020 - ieeexplore.ieee.org
The design of hardware-friendly architectures with low computational overhead is desirable
for low latency realization of CNN on resource-constrained embedded platforms. In this …

xUAVs: Towards efficient approximate computing for UAVs—Low power approximate adders with single LUT delay for FPGA-based aerial imaging optimization

T Nomani, M Mohsin, Z Pervaiz, M Shafique - IEEE Access, 2020 - ieeexplore.ieee.org
High Definition (HD) image processing and real-time analytics over live video feeds have
always been the key requirements for Intelligence, Surveillance and Reconnaissance (ISR) …

SIMDive: Approximate SIMD soft multiplier-divider for FPGAs with tunable accuracy

Z Ebrahimi, S Ullah, A Kumar - Proceedings of the 2020 on Great Lakes …, 2020 - dl.acm.org
The ever-increasing quest for data-level parallelism and variable precision in ubiquitous
multimedia and Deep Neural Network (DNN) applications has motivated the use of Single …