{MatrixKV}: Reducing Write Stalls and Write Amplification in {LSM-tree} Based {KV} Stores with Matrix Container in {NVM}
Popular LSM-tree based key-value stores suffer from suboptimal and unpredictable
performance due to write amplification and write stalls that cause application performance to …
performance due to write amplification and write stalls that cause application performance to …
Effectively prefetching remote memory with leap
H Al Maruf, M Chowdhury - 2020 USENIX Annual Technical Conference …, 2020 - usenix.org
Memory disaggregation over RDMA can improve the performance of memory-constrained
applications by replacing disk swapping with remote memory accesses. However, state-of …
applications by replacing disk swapping with remote memory accesses. However, state-of …
Optimizing memory-mapped {I/O} for fast storage devices
Memory-mapped I/O provides several potential advantages over explicit read/write I/O,
especially for low latency devices:(1) It does not require a system call,(2) it incurs almost …
especially for low latency devices:(1) It does not require a system call,(2) it incurs almost …
I/O acceleration via multi-tiered data buffering and prefetching
Abstract Modern High-Performance Computing (HPC) systems are adding extra layers to the
memory and storage hierarchy, named deep memory and storage hierarchy (DMSH), to …
memory and storage hierarchy, named deep memory and storage hierarchy (DMSH), to …
[HTML][HTML] Implications of NVM based storage on memory subsystem management
Featured Application The authors anticipate that memory and storage configurations
explored in this article will be helpful in the design of system software for future computer …
explored in this article will be helpful in the design of system software for future computer …
NVDIMM-C: A byte-addressable non-volatile memory module for compatibility with standard DDR memory interfaces
C Lee, W Shin, DJ Kim, Y Yu, SJ Kim… - … Symposium on High …, 2020 - ieeexplore.ieee.org
Currently, there are two representative non-volatile dual in-line memory module (NVDIMM)
interfaces: a proprietary Intel DDR-T and the JEDEC NVDIMM-P, which are not supported by …
interfaces: a proprietary Intel DDR-T and the JEDEC NVDIMM-P, which are not supported by …
FastPath_MP: Low overhead & energy-efficient FPGA-based storage multi-paths
In this article, we present FastPath_MP, a novel low-overhead and energy-efficient storage
multi-path architecture that leverages FPGAs to operate transparently to the main processor …
multi-path architecture that leverages FPGAs to operate transparently to the main processor …
Hybrid framework of NVMe-based storage system in cloud computing environment
Z Yang, M Hoseinzadeh, P Wong, J Artoux… - US Patent …, 2020 - Google Patents
A non-volatile memory (NVM) express (NVMe) system includes at least one user application,
an NVMe controller and a hypervisor. Each user application runs in a respective virtual …
an NVMe controller and a hypervisor. Each user application runs in a respective virtual …
Understanding and analysis of B+ trees on NVM towards consistency and efficiency
The emerging non-volatile memory (NVM) possesses DRAM-like performance and disk-like
persistency, driving a trend of building single-level storage systems by replacing DRAM and …
persistency, driving a trend of building single-level storage systems by replacing DRAM and …
[图书][B] Specialization as a Candle in the Dark Silicon Regime
N Goulding-Hotta - 2020 - search.proquest.com
For decades computer architects have taken advantage of Moore's law to get bigger, faster,
and more energy-efficient chips" for free," reaping the benefits of silicon process …
and more energy-efficient chips" for free," reaping the benefits of silicon process …