A survey on approximate multiplier designs for energy efficiency: From algorithms to circuits

Y Wu, C Chen, W Xiao, X Wang, C Wen, J Han… - ACM Transactions on …, 2024 - dl.acm.org
Given the stringent requirements of energy efficiency for Internet-of-Things edge devices,
approximate multipliers, as a basic component of many processors and accelerators, have …

[HTML][HTML] Adaptive approximate computing in edge AI and IoT applications: A review

HJ Damsgaard, A Grenier, D Katare, Z Taufique… - Journal of Systems …, 2024 - Elsevier
Recent advancements in hardware and software systems have been driven by the
deployment of emerging smart health and mobility applications. These developments have …

Efficient and low-cost approximate multipliers for image processing applications

B Rashidi - Integration, 2024 - Elsevier
The image processing can be implemented in an error-tolerant mode with acceptable
accuracy. In digital image processing, the adders and multipliers are the most important …

High-Speed Energy-Efficient Fixed-Point Signed Multipliers for FPGA-Based DSP Applications

MS Nagar, A Mathuriya, SH Patel… - IEEE Embedded …, 2024 - ieeexplore.ieee.org
Among various platforms for computer vision algorithms, FPGA has gained popularity as a
low-power solution. These algorithms involve convolution operation which are extensively …

DyRecMul: Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration

S Vakili, M Vaziri, A Zarei, JMP Langlois - ACM Transactions on …, 2024 - dl.acm.org
Multipliers are widely-used arithmetic operators in digital signal processing and machine
learning circuits. Due to their relatively high complexity, they can have high latency and be a …

High-Efficiency FPGA-Based Approximate Multipliers with LUT Sharing and Carry Switching

Y Guo, Q Zhou, X Chen, H Sun - 2024 Design, Automation & …, 2024 - ieeexplore.ieee.org
Approximate multiplier saves energy and improves hardware performance for error-tolerant
computation-intensive applications. This work proposes hardware-efficient FPGA-based …

Multi-ALM: Run-time Multi-Level Reconfigurable Approximate Logarithmic Multiplier

M Tasnim, C Raje, SXD Tan - 2024 25th International …, 2024 - ieeexplore.ieee.org
This paper presents a novel multi-level approximate logarithmic multiplier (ALM) named
multi-ALM that offers dynamic run-time re-configurability for various precision, performance …

Design of Low Power Booth Multiplier with Enhance Pre-logic Mechanism Using Verilog

A Parsodia, P Jindal - International Conference on Smart Computing and …, 2024 - Springer
A Booth Radix-4 multiplier is a commonly used digital circuit for performing high-speed
multiplication of binary numbers in modern microprocessors. Low power consumption is a …

AxOCS: Scaling FPGA-Based Approximate Operators Using Configuration Supersampling

SS Sahoo, S Ullah, S Bhattacharjee… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
The rising usage of AI/ML-based processing across application domains has exacerbated
the need for low-cost ML implementation, specifically for resource-constrained embedded …