The paper brings an overview of main challenges and design techniques effectively
applicable for ultra-low voltage analog integrated circuits in nanoscale technologies. New …

This paper describes architecture of voltage level shifter used in multi-supply design
applications and an application of voltage level shifter. Voltage level shifter is a device which …

Level shifter (LS) circuits are widely used as an interface for multiple voltage domains in
modern ICs and System on Chips (SoCs). Low power dissipation is one of the main design …

Multi supply voltage domain is an ultimate approach for reducing power consumption at
system level. To interconnect multi supply voltage designs, and to prevent static current, the …

In today's manycore processors, the energy loss of more than 20% may result from inherent
inefficiencies of conventional power delivery system (PDS) design. By stacking multiple …

The design of advanced miniaturized ultra-low power interfaces for sensors is extremely
important for energy-constrained monitoring applications, such as wearable, ingestible and …

As chips increase in complexity with ever increasing power consumption, pressure in
efficient power delivery mechanism such as multi-VDD, voltage stacked and DVS continues …

The paper demonstrates a new configuration of level shifters for low power application
which is a 45nm CMOS technology and simulated in cadence tool. Conventional level shifter …

This paper presents a new high-performance and low-power single-supply voltage level
converter (SSLC) and a new carry save array multiplier based on clustered-voltage scaling …

CMOS voltage level shifters. A voltage level-shifter shifts the level of output voltage from a
digital circuit. Level Shifter circuits are compared in terms of output voltage level, power …