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Reliable software for unreliable hardware: embedded code generation aiming at reliability

Published: 09 October 2011 Publication History
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  • Abstract

    A compilation technique for reliability-aware software transformations is presented. An instruction-level reliability estimation technique quantifies the effects of hardware-level faults at the instruction-level while considering spatial and temporal vulnerabilities. It bridges the gap between hardware - where faults occur according to our fault model - and software (the abstraction level where we aim to increase reliability). For a given tolerable performance overhead, an optimization algorithm compiles an application software with respect to a tradeoff between performance and reliability. Compared to performance-optimized compilation, our method incurs 60%-80% lower application failures, averaged over various fault injection scenarios and fault rates.

    References

    [1]
    R. Baumann, "Radiation-induced soft errors in advanced semiconductor technologies," IEEE TDMR, vol. 5, no. 3, pp. 305--316, 2005.
    [2]
    P. Giacinto et al., "An experimental Study of Soft Error in Microprocessors", MICRO, pp. 30--39, 2005.
    [3]
    R. Vadlamani et al., "Multicore soft error rate stabilization using adaptive dual modular redundancy", DATE, pp. 27--32, 2010.
    [4]
    D. Ernst et al., "Razor: circuit-level correction of timing errors for low-power operation," IEEE MICRO, vol. 24, no. 3, pp. 10--20, 2004.
    [5]
    S. S. Mukherjee, et al., "A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor", MICRO, pp. 29--40, 2003.
    [6]
    R. Venkatasubramanianw et al., "Low cost on-line fault detection using control flow assertions". IEEE IOLTS, pp. 137--143, 2003.
    [7]
    P. P. Shirvani et al., "Software implemented EDAC protection against SEUs". IEEE Transactions on Reliability, vol. 49, pp. 273--284, 2000.
    [8]
    V. Sridharan, "Introducing Abstraction to Vulnerability Analysis", Ph.D. Thesis, March 2010.
    [9]
    V. Sridharan et al., "Eliminating Micro-architectural Dependency from Architectural Vulnerability", HPCA, pp. 117--128, 2009.
    [10]
    G. A. Reis et al., "SWIFT: Software Implemented Fault Tolerance", IEEE CGO, pp. 243--254, 2005.
    [11]
    N. Oh et al., "Error detection by duplicated instructions in super-scalar processors", IEEE Transaction on Reliability, vol. 51, no. 1, pp. 63--75, 2002.
    [12]
    J. Hu et al., "In-Register Duplication: Exploiting Narrow-Width Value for Improving Register File Reliability," DSN, pp. 281--290, 2006.
    [13]
    J. S. Hu et al., "Compiler-Directed Instruction Duplication for Soft Error Detection," DATE, vol. 2, pp. 1056--1057, 2005
    [14]
    G. A. Reis et al., "Software controlled fault tolerance," ACM TACO, vol. 2, pp. 366--396, 2005.
    [15]
    P. Lokuciejewski et al., "Combining Worst-Case Timing Models, Loop Unrolling, and Static Loop Analysis for WCET Minimization," ECRTS, pp. 35--44, 2009.
    [16]
    V. Sarkar, "Optimized Unrolling of Nested Loops", International Journal on Parallel Programing, 29(5):545--581, 2001.
    [17]
    J. Lee et al., "Compiler approach for reducing soft errors in register file", IEEE LCTES, pp. 41--49, 2009.
    [18]
    J. Yan et al., "Compiler guided register reliability improvement against soft errors," IEEE EMSOFT, pp. 203--209, 2005.
    [19]
    D. Borodin et al., "Protected Redundancy Overhead Reduction Using Instruction Vulnerability Factor," IEEE CF, pp. 319--326, 2010.
    [20]
    U. Schiffel et al., "Software-Implemented Hardware Error Detection: Costs and Gains," IEEE DEPEND, pp. 51--57, 2010.
    [21]
    C. Lee et al., "Compiler optimization on instruction scheduling for low power," IEEE ISSS, pp. 55--60, 2000.
    [22]
    K. Pattabiraman et al., "SymPLFIED: Symbolic program-level fault injection and error detection framework", DSN, pp. 472--481, 2008.
    [23]
    H. Ziade et al., "A Survey on Fault Injection Techniques", IAJIT, vol. 1, no. 2, pp. 171--186, 2004.
    [24]
    R. Velazco et al., "Injecting Bit Flip Faults by Means of a purely Software Approach: a Case Studied", IEEE DFT, pp. 108--116, 2002.
    [25]
    M. Rebaudengo, M. S. Reorda, M. Violante, "Analysis of SEU effects in a pipelined processor", IEEE IOLTW, pp. 112--116, 2002.
    [26]
    Flux calculator: www.seutest.com/cgi-bin/FluxCalculator.cgi.
    [27]
    J. Gaisler, "A portable and fault-tolerant microprocessor based on the SPARC v8 architecture", DSN, pp. 409--415, 2002.
    [28]
    IBM® XIV® Storage System cache: http://publib.boulder.ibm.com/infocenter/ibmxiv/r2/index.jsp.
    [29]
    AMD Phenom™ II Processor Product Data Sheet 2010.
    [30]
    X. Fu, W. Zhang, T. Li, J. Fortes, "Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures", International Conference on Parallel Processing, pp. 190--197, 2008.
    [31]
    H.264 Codec: http://iphome.hhi.de/suehring/tml/index.htm
    [32]
    L. Lin et al., "Soft error and energy consumption interactions: a data cache perspective", ISLPED, pp. 132--137, 2004.

    Cited By

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    • (2022)An Embedded Software Development Framework for Internet of Things DevicesElectronics10.3390/electronics1124415811:24(4158)Online publication date: 13-Dec-2022
    • (2021)REPAIR: Control Flow Protection based on Register Pairing Updates for SW-Implemented HW Fault ToleranceACM Transactions on Embedded Computing Systems10.1145/347700120:5s(1-22)Online publication date: 17-Sep-2021
    • (2021)Precise Cache Profiling for Studying Radiation EffectsACM Transactions on Embedded Computing Systems10.1145/344233920:3(1-25)Online publication date: 27-Mar-2021
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    1. Reliable software for unreliable hardware: embedded code generation aiming at reliability

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          cover image ACM Conferences
          CODES+ISSS '11: Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
          October 2011
          402 pages
          ISBN:9781450307154
          DOI:10.1145/2039370
          Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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          Publication History

          Published: 09 October 2011

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          Author Tags

          1. code generation
          2. dependability
          3. embedded systems
          4. instruction vulnerability estimation
          5. reliability
          6. reliability estimation
          7. reliability-aware software transformations
          8. reliable software
          9. technology scaling

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          • Research-article

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          ESWeek '11
          ESWeek '11: Seventh Embedded Systems Week
          October 9 - 14, 2011
          Taipei, Taiwan

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          Overall Acceptance Rate 280 of 864 submissions, 32%

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          ESWEEK '24
          Twentieth Embedded Systems Week
          September 29 - October 4, 2024
          Raleigh , NC , USA

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          Cited By

          View all
          • (2022)An Embedded Software Development Framework for Internet of Things DevicesElectronics10.3390/electronics1124415811:24(4158)Online publication date: 13-Dec-2022
          • (2021)REPAIR: Control Flow Protection based on Register Pairing Updates for SW-Implemented HW Fault ToleranceACM Transactions on Embedded Computing Systems10.1145/347700120:5s(1-22)Online publication date: 17-Sep-2021
          • (2021)Precise Cache Profiling for Studying Radiation EffectsACM Transactions on Embedded Computing Systems10.1145/344233920:3(1-25)Online publication date: 27-Mar-2021
          • (2021)Evaluating Soft Error Mitigation Trade-offs During Early Design StagesArchitecture of Computing Systems10.1007/978-3-030-81682-7_14(213-228)Online publication date: 15-Jul-2021
          • (2020)A Highly Reliable Compilation Optimization Passes Sequence Generation FrameworkIEICE Transactions on Information and Systems10.1587/transinf.2020EDL8006E103.D:9(1998-2002)Online publication date: 1-Sep-2020
          • (2020)High-Reliability Compilation Optimization Sequence Generation Framework Based ANN2020 IEEE 20th International Conference on Software Quality, Reliability and Security (QRS)10.1109/QRS51102.2020.00053(347-355)Online publication date: Dec-2020
          • (2020)G-SEAP: Analyzing and characterizing soft-error aware approximation in GPGPUsFuture Generation Computer Systems10.1016/j.future.2020.03.040Online publication date: Mar-2020
          • (2020)Background on Soft ErrorsSoft Error Reliability Using Virtual Platforms10.1007/978-3-030-55704-1_2(9-17)Online publication date: 3-Nov-2020
          • (2020)Dependable Software Generation and Execution on Embedded SystemsDependable Embedded Systems10.1007/978-3-030-52017-5_6(139-160)Online publication date: 10-Dec-2020
          • (2020)Power-Aware Fault-Tolerance for Embedded SystemsDependable Embedded Systems10.1007/978-3-030-52017-5_24(565-588)Online publication date: 10-Dec-2020
          • Show More Cited By

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