Analog multipliers-based double output voltage phase detector for low-frequency demodulation of frequency modulated signals
This work deals with the design of a simple double output voltage phase detector, using a
specific type of analog multiplier, and its application in a frequency demodulator. The design …
specific type of analog multiplier, and its application in a frequency demodulator. The design …
A new strategy to design low power translinear based CMOS analog multiplier
This paper deals with a new method to design CMOS analog multiplier which operates in
four quadrants. The main core of the proposed multiplier circuit consists of two common …
four quadrants. The main core of the proposed multiplier circuit consists of two common …
Design and Fabrication of Novel Digital Transcranial Electrical Stimulator for Medical and Psychiatry Applications
In this article, we design a novel Transcranial Electrical Stimulator for medical applications,
which is very cheap and can produce the desired signals very accurately. Our fabricated …
which is very cheap and can produce the desired signals very accurately. Our fabricated …
Four-quadrant CMOS analog current multiplier using frequency compensation and 1.5 V supply
U Bansal, P Masiwal, M Yadav, M Mohlia… - Arabian Journal for …, 2021 - Springer
This work presents two new CMOS designs of current mode squarer circuits using a 1.5 V
supply. The four-quadrant multiplier has also been designed using proposed squarer …
supply. The four-quadrant multiplier has also been designed using proposed squarer …
An efficient architecture for accurate and low power CMOS analog multiplier
A new analog four-quadrant multiplier in CMOS technology is proposed using translinear
loops (TLs). The novelty of the work includes an improved structure resulting in high …
loops (TLs). The novelty of the work includes an improved structure resulting in high …
A new low voltage current mode analog multiplier/divider circuit based on FGMOS translinear loop
This paper presents a novel low voltage current mode analog multiplier/divider. The
proposed circuit comprises of a floating gate MOSFET (FGMOS) translinear loop and a …
proposed circuit comprises of a floating gate MOSFET (FGMOS) translinear loop and a …
Compact design of high-speed low-error four-quadrant current multiplier with reduced power dissipation
In this paper, a compact low-power, high-speed, low-error four-quadrant analog multiplier is
proposed using a new simple current squarer circuit. The new squarer circuit consists of an …
proposed using a new simple current squarer circuit. The new squarer circuit consists of an …