Total ionizing dose effects on the noise performances of a 0.13/spl mu/m CMOS technology
This paper presents a study of the ionizing radiation tolerance of 0.13/spl mu/m CMOS
transistors, in view of the application to the design of rad-hard analog integrated circuits …
transistors, in view of the application to the design of rad-hard analog integrated circuits …
Direct white noise characterization of short-channel MOSFETs
On-wafer evaluation of white thermal and shot noise in nanoscale MOSFETs is
demonstrated by directly sensing the drain current under zero-and nonzero-drain-bias () …
demonstrated by directly sensing the drain current under zero-and nonzero-drain-bias () …
Comparison of a BSIM3V3 and EKV MOSFET model for a 0.5/spl mu/m CMOS process and implications for analog circuit design
SC Terry, JM Rochelle, DM Binkley… - IEEE transactions on …, 2003 - ieeexplore.ieee.org
Design requirements for high-density detector front-ends and other high-performance
analog systems routinely force designers to operate devices in moderate inversion …
analog systems routinely force designers to operate devices in moderate inversion …
Comprehensive study of total ionizing dose damage mechanisms and their effects on noise sources in a 90 nm CMOS technology
Irradiation tests on 90 nm CMOS devices at different total ionizing doses lead to new insights
into degradation mechanisms in gate oxides and lateral isolation structures and into their …
into degradation mechanisms in gate oxides and lateral isolation structures and into their …
Noise Characterization of 130 nm and 90 nm CMOS Technologies for Analog Front-end Electronics
Deep-submicron complementary MOS processes have made the development of ASICs for
HEP instrumentation possible. In the last few years CMOS commercial technologies of the …
HEP instrumentation possible. In the last few years CMOS commercial technologies of the …
Survey of noise performances and scaling effects in deep submicron CMOS devices from different foundries
Submicron CMOS technologies provide well-established solutions to the implementation of
low-noise front-end electronics for a wide range of detector applications. Since commercial …
low-noise front-end electronics for a wide range of detector applications. Since commercial …
Impact of lateral isolation oxides on radiation-induced noise degradation in CMOS technologies in the 100-nm regime
Degradation mechanisms associated to lateral isolation oxides are discussed to account for
total ionizing dose effects on the noise performance of 90 nm and 130 nm CMOS devices …
total ionizing dose effects on the noise performance of 90 nm and 130 nm CMOS devices …
Assessment of a low-power 65 nm CMOS technology for analog front-end design
This work is concerned with the study of the analog properties of MOSFET devices
belonging to a 65 nm CMOS technology with emphasis on intrinsic voltage gain and noise …
belonging to a 65 nm CMOS technology with emphasis on intrinsic voltage gain and noise …
Introducing 65 nm CMOS technology in low-noise read-out of semiconductor detectors
The large scale of integration provided by CMOS processes with minimum feature size in the
100nm range, makes them very attractive in the design of front-end electronics for highly …
100nm range, makes them very attractive in the design of front-end electronics for highly …
Characterization of a 28 nm CMOS Technology for Analog Applications in High Energy Physics
In the past few years, the 28 nm CMOS technology has raised interest in the high energy
physics community for the design and implementation of readout integrated circuits for high …
physics community for the design and implementation of readout integrated circuits for high …