Recent advances in convolutional neural network acceleration

Q Zhang, M Zhang, T Chen, Z Sun, Y Ma, B Yu - Neurocomputing, 2019 - Elsevier
In recent years, convolutional neural networks (CNNs) have shown great performance in
various fields such as image classification, pattern recognition, and multi-media …

Accelerating CNN inference on ASICs: A survey

D Moolchandani, A Kumar, SR Sarangi - Journal of Systems Architecture, 2021 - Elsevier
Convolutional neural networks (CNNs) have proven to be a disruptive technology in most
vision, speech and image processing tasks. Given their ubiquitous acceptance, the research …

Bit fusion: Bit-level dynamically composable architecture for accelerating deep neural network

H Sharma, J Park, N Suda, L Lai… - 2018 ACM/IEEE 45th …, 2018 - ieeexplore.ieee.org
Hardware acceleration of Deep Neural Networks (DNNs) aims to tame their enormous
compute intensity. Fully realizing the potential of acceleration in this domain requires …

Channelnets: Compact and efficient convolutional neural networks via channel-wise convolutions

H Gao, Z Wang, S Ji - Advances in neural information …, 2018 - proceedings.neurips.cc
Convolutional neural networks (CNNs) have shown great capability of solving various
artificial intelligence tasks. However, the increasing model size has raised challenges in …

A real-time convolutional neural network for super-resolution on FPGA with applications to 4K UHD 60 fps video services

Y Kim, JS Choi, M Kim - … on Circuits and Systems for Video …, 2018 - ieeexplore.ieee.org
In this paper, we present a novel hardware-friendly super-resolution (SR) method based on
a convolutional neural network (CNN) and its dedicated hardware (HW) on field …

Mst-compression: Compressing and accelerating binary neural networks with minimum spanning tree

QH Vo, LT Tran, SH Bae, LW Kim… - Proceedings of the …, 2023 - openaccess.thecvf.com
Binary neural networks (BNNs) have been widely adopted to reduce the computational cost
and memory storage on edge-computing devices by using one bit representation for …

An energy-efficient reconfigurable processor for binary-and ternary-weight neural networks with flexible data bit width

S Yin, P Ouyang, J Yang, T Lu, X Li… - IEEE Journal of Solid …, 2018 - ieeexplore.ieee.org
Due to less memory requirement, low computation overhead and negligible accuracy
degradation, deep neural networks with binary/ternary weights (BTNNs) have been widely …

Nand-net: Minimizing computational complexity of in-memory processing for binary neural networks

H Kim, J Sim, Y Choi, LS Kim - 2019 IEEE international …, 2019 - ieeexplore.ieee.org
Popular deep learning technologies suffer from memory bottlenecks, which significantly
degrade the energy-efficiency, especially in mobile environments. In-memory processing for …

Automatic group-based structured pruning for deep convolutional networks

H Wei, Z Wang, G Hua, J Sun, Y Zhao - IEEE Access, 2022 - ieeexplore.ieee.org
Structured pruning methods have been used in several convolutional neural networks
(CNNs). However, group-based structured pruning is a challenging task. In previous …

Towards fast and energy-efficient binarized neural network inference on fpga

C Fu, S Zhu, H Su, CE Lee, J Zhao - arXiv preprint arXiv:1810.02068, 2018 - arxiv.org
Binarized Neural Network (BNN) removes bitwidth redundancy in classical CNN by using a
single bit (-1/+ 1) for network parameters and intermediate representations, which has …