Programmable data plane technologies enable the systematic reconfiguration of the low-
level processing steps applied to network packets and are key drivers toward realizing the …

The conventional wisdom is that CPU resources such as cores, caches, and memory
bandwidth must be partitioned to achieve performance isolation between tasks. Both the …

Multiple vendors have recently released SmartNICs that provide both special-purpose
accelerators and programmable processing cores that allow increasingly sophisticated …

RAN virtualization will become a key technology for the last mile of next-generation mobile
networks driven by initiatives such as the O-RAN alliance. However, due to the computing …

Cloud services are deployed in datacenters connected though high-bandwidth Wide Area
Networks (WANs). We find that WAN traffic negatively impacts the performance of datacenter …

Recent years have witnessed the wide adoption of RDMA in the cloud to accelerate first-
party workloads and achieve cost savings by freeing up CPU cycles. Now cloud providers …

Recent In-Network Aggregation (INA) solutions offload the all-reduce operation onto network
switches to accelerate and scale distributed training (DT). On end hosts, these solutions …

We present a technique, called CFAR, that developers can use to reason precisely about
how their code, as well as third-party code, uses the CPU cache. Given a piece of systems …

Emerging mobile apps such as UHD video and AR/VR access diverse high-throughput
hardware devices, eg, video codecs, cameras, and image processors. However, today's …

Core-Stateless Fair Queueing (CSFQ) is a scalable algorithm proposed more than two
decades ago to achieve fair queueing without keeping per-flow state in the network …