Co-packaged optics (CPO): status, challenges, and solutions

M Tan, J Xu, S Liu, J Feng, H Zhang, C Yao… - Frontiers of …, 2023 - Springer
Due to the rise of 5G, IoT, AI, and high-performance computing applications, datacenter
traffic has grown at a compound annual growth rate of nearly 30%. Furthermore, nearly three …

A 112-Gb/s PAM-4 long-reach wireline transceiver using a 36-way time-interleaved SAR ADC and inverter-based RX analog front-end in 7-nm FinFET

J Im, K Zheng, CHA Chou, L Zhou… - IEEE Journal of Solid …, 2020 - ieeexplore.ieee.org
A 36-way time-interleaved 56-GS/s 7-bit ADC is designed to realize 112-Gb/s pulse-
amplitude modulation (PAM-4) transceiver in a 7-nm FinFET CMOS. The receiver analog …

8.1 A 224Gb/s DAC-based PAM-4 transmitter with 8-tap FFE in 10nm CMOS

J Kim, S Kundu, A Balankutty, M Beach… - … Solid-State Circuits …, 2021 - ieeexplore.ieee.org
Wireline IOs have doubled per-lane data-rate every 3-4 years over the last two decades due
to increasing demand in high-performance computing, networking/communications, and …

[HTML][HTML] Terahertz metadevices for silicon plasmonics

Y Liang, H Yu, H Wang, HC Zhang, TJ Cui - Chip, 2022 - Elsevier
Metamaterial devices (metadevices) have been developed in progress aiming to generate
extraordinary performance over traditional devices in the (sub-) terahertz (THz) domain, and …

A 224-Gb/s DAC-based PAM-4 quarter-rate transmitter with 8-tap FFE in 10-nm FinFET

J Kim, S Kundu, A Balankutty, M Beach… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
This article presents analysis, design details, and measurement result of a 224-Gb/s four-
level pulse amplitude modulation (PAM-4) transmitter (TX) consisting of a 7-bit voltage …

A 4.63 pJ/b 112Gb/s DSP-Based PAM-4 Transceiver for a Large-Scale Switch in 5nm FinFET

H Park, M Abdullatif, E Chen, A Elmallah… - … Solid-State Circuits …, 2023 - ieeexplore.ieee.org
In hyper scale data centers, high-speed links beyond 100Gb/s are required by applications
such as XSR (co-packaged optics and die-to-die interconnects) or LR (ethernet switches …

A 0.64-pJ/bit 28-Gb/s/pin high-linearity single-ended PAM-4 transmitter with an impedance-matched driver and three-point ZQ calibration for memory interface

YU Jeong, H Park, C Hyun, JH Chae… - IEEE Journal of Solid …, 2020 - ieeexplore.ieee.org
A single-ended four-level pulse-amplitude modulation (PAM-4) transmitter (TX) for memory
interfaces achieves high signal integrity by combining an impedance-matched PAM-4 driver …

Sub-THz/THz interconnect, complement to electrical and optical interconnects: Addressing fundamental challenges related to communication distances

QJ Gu - IEEE Solid-State Circuits Magazine, 2020 - ieeexplore.ieee.org
The big data era has witnessed expansion of information traffic at a 26% compound annual
growth rate (CAGR) during one decade, as shown in Figure 1 (a)[1],[2]. Rising data rates …

An output bandwidth optimized 200-Gb/s PAM-4 100-Gb/s NRZ transmitter with 5-tap FFE in 28-nm CMOS

Z Wang, M Choi, K Lee, K Park, Z Liu… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
This article presents a 200-Gb/s pulse amplitude-modulation four-level (PAM-4) and 100-
Gb/s non-return-to-zero (NRZ) transmitter (TX) in 28-nm CMOS technology. To achieve the …

A 1.6 Tb/s chiplet over XSR-MCM channels using 113Gb/s PAM-4 transceiver with dynamic receiver-driven adaptation of TX-FFE and programmable roaming taps in …

G Gangasani, D Hanson, D Storaska… - … Solid-State Circuits …, 2022 - ieeexplore.ieee.org
Hyperscale data center applications are driving the need for high bandwidth, high
throughput per chip-edge, ultra-low-power serial-IO solutions over extremely short-reach …