Hardware security exploiting post-CMOS devices: fundamental device characteristics, state-of-the-art countermeasures, challenges and roadmap

A Japa, MK Majumder, SK Sahoo… - IEEE Circuits and …, 2021 - ieeexplore.ieee.org
Emerging nanoelectronic semiconductor devices have been quite promising in enhancing
hardware-oriented security and trust. However, implementing hardware security primitives …

Performance analysis of heterojunction tunnel FET device with variable temperature

IA Pindoo, SK Sinha, S Chander - Applied Physics A, 2021 - Springer
In this paper, the analysis of SiGe source-based heterojunction Tunnel FET device is
reported. The parameters like transconductance (gm), device efficiency (gm/ID), gate-source …

Machine learning-based run-to-run control of a spatial thermal atomic layer etching reactor

M Tom, S Yun, H Wang, F Ou, G Orkoulas… - Computers & Chemical …, 2022 - Elsevier
In response to the next technological revolution, atomic layer processes have emerged to
produce high-performing, thin-film semiconductor materials. To overcome the long purging …

Temperature analysis of Ge/Si heterojunction SOI-tunnel FET

S Chander, SK Sinha, S Kumar, PK Singh… - Superlattices and …, 2017 - Elsevier
Temperature is a thermal parameter which affects the device performance. This paper
presents the impact of the temperature variation on the electrical characteristics such as …

Improvement of electrical characteristics of SiGe source based tunnel FET device

IA Pindoo, SK Sinha, S Chander - Silicon, 2021 - Springer
Abstract Tunnel Field Effect Transistor (TFET) is one of the most promising alternative device
for semiconductor technology and shows better performance as compared to the …

The impact of a recessed Δ-shaped gate in a vertical CAVET AlGaN/GaN MIS-HEMT for high-power low-loss switching applications

A Danielraj, S Deb, A Mohanbabu… - Journal of Computational …, 2022 - Springer
A Δ-shaped gate GaN-based E-mode vertical current-aperture vertical electron transistor
(CAVET) device with a boron-doped current block layer (B-CBL) on an n+ GaN substrate is …

Investigation of DC performance of Ge-source pocket silicon-on-insulator tunnel field effect transistor in nano regime

SK Sinha, S Chander - International Journal of …, 2021 - inderscienceonline.com
As devices are scaled down in nano regime the steepest subthreshold swing becomes the
most desirable characteristic for the improvement of the performance of devices. To address …

Temperature analysis of DMGC CGAA FET for future deep space and military applications: an insight into Analog/RF/Self-Heating/Linearity

PK Mudidhe, BR Nistala - ECS Journal of Solid State Science and …, 2023 - iopscience.iop.org
This manuscript introduces a pioneering investigation on the temperature effects of Dual
Material Graded Channel (DMGC) Cylindrical Gate All Around (CGAA) FET by outlining its …

Simple and rapid gas sensing using a single-walled carbon nanotube field-effect transistor-based logic inverter

S Forel, L Sacco, A Castan, I Florea… - Nanoscale …, 2021 - pubs.rsc.org
Single-walled carbon nanotubes (SWCNTs) are promising candidates for gas sensing
applications, providing an efficient solution to the device miniaturization challenge and …

Impact of dielectric pocket on analog and high-frequency performances of cylindrical gate-all-around tunnel FETs

CK Pandey, D Dash, S Chaudhury - ECS Journal of Solid State …, 2018 - iopscience.iop.org
In this paper, a novel structure of cylindrical GAA-TFETs with high-k dielectric pocket is
proposed to improve the analog and high-frequency performances. We have discussed the …