Oversampled Sigma Delta ADC decimation filter: Design techniques, challenges, tradeoffs and optimization

NN Hurrah, Z Jan, A Bhardwaj… - … on Recent Advances …, 2015 - ieeexplore.ieee.org
With the rapid developments in the IC technology and signal processing oversampled
Sigma Delta (ΣΔ) ADCs have become the absolute choice among the competent data …

Power Linear DACs (PLDACs) for Configuration and Control of Silicon Photonic Integrated Circuits

V Kumar, S Mishra, V Saxena - 2023 IEEE International …, 2023 - ieeexplore.ieee.org
Silicon photonics has emerged as a key enabler for progressing integrated circuits in the
post-Moore scaling era, whereby the advantages of photonics complement the mature and …

A power consumption and area improved design of IIR decimation filters via MDT

SZ Naqvi, SZ Hassan, T Kamal - … International Conference on …, 2016 - ieeexplore.ieee.org
This manuscript provides a novel method to improve occupied area, speed and power
consumption of Infinite Impulse Response (IIR) decimation filter. The filter is design using …

High-speed low-power decimation filter for wideband delta-sigma ADC

Y Xie, M Zhang, B Wei, X Fan - 2014 IEEE 57th International …, 2014 - ieeexplore.ieee.org
This paper discusses the design of high-speed low-power decimation filter for wideband
Delta-Sigma ADC. It presents a low power decimation filter with programmable decimation …

[PDF][PDF] Design and Implementation of Decimation Filter for 13-bit Sigma-Delta ADC Based on FPGA

KK Mohammed, MI Dawod - Tikrit Journal of Engineering Sciences, 2016 - iasj.net
Abstract A 13 bit Sigma-Delta ADC for a signal band of 40K Hz is designed in MATLAB
Simulink and then implemented using Xilinx system generator tool. The first order Sigma …

[PDF][PDF] Low-Power High-Resolution ΔΣM for Next Generation Space Analog to Digital Converters

A Suanes Pérez - 2022 - ddd.uab.cat
ADVERTIMENT. Lʼaccés als continguts dʼaquesta tesi queda condicionat a lʼacceptació de les
condicions dʼús establertes pe Page 1 ADVERTIMENT. Lʼaccés als continguts dʼaquesta tesi …

Algorithmic Tracking Scheme Analog-to-Digital Converter

O Bachmann - tuprints.ulb.tu-darmstadt.de
Information is an increasingly important factor in today's world. In particular, the acquisition
of physical parameters and their processing are essential for modern applications. Every …

[PDF][PDF] Comparative Analysis of Decimation Approach of Single Stage Discrete Time Sigma-Delta modulator using Simulink

A Shukla, MAK Sahu - 2015 - academia.edu
Modulator is one of the most significant building-blocks in integrated discrete time
component used in Sigma-Delta (ΣΔ) analog to digital converter. In this paper a novel …

A decimation filter for Sigma delta modulator in FMCW radar transceiver and the design methodology

Y Lin, J Xu, LY Dai - … International Conference on Solid-State & …, 2020 - ieeexplore.ieee.org
This paper presents a design and the design methodology of a decimation filter for both a
Sigma delta ADC and its application in a FMCW radar transceiver. A 16-bits decimation filter …

Multistage Multirate Transfer Function Automated Synthesis Using Hybrid Sampling Strategy-Based Differential Evolution

AG Wassal, AM Ibrahim… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Modern digital systems require one or more frequency shaping modules that realize certain
transfer functions, usually in the form of digital filters. Breaking up the design into multiple …