Reconfigurable content-addressable memory (CAM) on FPGAs: A tutorial and survey

M Irfan, AI Sanka, Z Ullah, RCC Cheung - Future Generation Computer …, 2022 - Elsevier
Content-addressable memory (CAM) is a massively parallel searching device that returns
the address of a given search input in one clock cycle. Field-programmable gate array …

[HTML][HTML] Efficient pipelined flow classification for intelligent data processing in IoT

SN Mousavi, F Chen, M Abbasi, MR Khosravi… - Digital Communications …, 2022 - Elsevier
The packet classification is a fundamental process in provisioning security and quality of
service for many intelligent network-embedded systems running in the Internet of Things …

Using FPGA-based content-addressable memory for mnemonics instruction searching in assembler design

H Öztekin, A Lazzem, İ Pehlivan - The Journal of Supercomputing, 2023 - Springer
Memories play an essential role in computer systems as they store and retrieve data that
may include instructions required for system operation. In the case of an assembler, the …

Comparative Analysis of Power and Hardware Utilization in an Energy-Efficient 8: 3 Encoder

S Shrivastava, A Kaur - 2023 4th International Conference on …, 2023 - ieeexplore.ieee.org
Several developing countries are presently facing serious energy shortages. The research
and development of an energy-efficient 8: 3 encoder using the Vivado software platform and …

Request, coalesce, serve, and forget: Miss-optimized memory systems for bandwidth-bound cache-unfriendly applications on FPGAs

M Asiatici, P Ienne - ACM Transactions on Reconfigurable Technology …, 2021 - dl.acm.org
Applications such as large-scale sparse linear algebra and graph analytics are challenging
to accelerate on FPGAs due to the short irregular memory accesses, resulting in low cache …

Dual-port content addressable memory for cache memory applications

A Abumwais, A Amirjanov, K Uyar, M Eleyat - 2021 - repository.aaup.edu
Multicore systems oftentimes use multiple levels of cache to bridge the gap between
processor and memory speed. This paper presents a new design of a dedicated pipeline …

BiCAM-based automated scoring system for digital logic circuit diagrams

H Öztekin - Open Chemistry, 2022 - degruyter.com
In online education, it is critical for the quality of education to evaluate and grade the
assignments or examinations that students upload to the system. However, it is time …

A fast, smart packet classification algorithm based on decomposition

C Li, X Zeng, L Song, Y Jiang - Journal of Control Science and …, 2020 - Wiley Online Library
Packet classification algorithms have been the focus of research for the last few years, due
to the vital role they play in various services based on packet forwarding. However, as the …

A CRC‐Based Classifier Micro‐Engine for Efficient Flow Processing in SDN‐Based Internet of Things

M Abbasi, N Mousavi, M Rafiee… - Mobile Information …, 2020 - Wiley Online Library
In the Internet of things (IoT), network devices and mobile systems should exchange a
considerable amount of data with negligible delays. For this purpose, the community has …

A network packet classification engine for real-time applications with enhanced performance

M Adiseshaiah, M Sailaja - International Journal of …, 2024 - inderscienceonline.com
With the advancements in digital communication systems, security is one of the essential
components of real-time communication systems. Packet classification is one of the most …