Early Routability Assessment in VLSI Floorplans: A Generalized Routing Model

B Kar, S Sur-Kolay, C Mandal - arXiv preprint arXiv:1810.12789, 2018 - arxiv.org
Multiple design iterations are inevitable in nanometer Integrated Circuit (IC) design flow until
desired printability and performance metrics are achieved. This starts with placement …

An early global routing framework for uniform wire distribution in SoCs

B Kar, S Sur-Kolay, C Mandal - 2016 29th IEEE International …, 2016 - ieeexplore.ieee.org
System-on-Chips (SoC) are being used to realize multipurpose devices such as mobile
phones, consumer electronics which can connect over the internet. The design process …