The virtual-to-physical address translation overhead, a major performance bottleneck for
modern workloads, can be effectively alleviated with huge pages. However, since huge …

Effective huge page management in operating systems is necessary for mitigation of
address translation overheads. However, this continues to remain a difficult area in OS …

With explosive growth in dataset sizes and increasing machine memory capacities, per-
application memory footprints are commonly reaching into hundreds of GBs. Such huge …

The unabating growth of the memory needs of emerging datacenter applications has
exacerbated the scalability bottleneck of virtual memory. However, reducing the excessive …

Multi-socket machines with 1-100 TBs of physical memory are becoming prevalent.
Applications running on such multi-socket machines suffer non-uniform bandwidth and …

The unprecedented growth in the memory needs of emerging memory-intensive workloads
has made virtual memory translation a major performance bottleneck. To address this …

We propose synergistic software and hardware mechanisms that alleviate the address
translation overhead, focusing particularly on virtualized execution. On the software side, we …

Intel and AMD processors have long supported more than one large page sizes–1GB and
2MB, to reduce address translation overheads for applications with large memory footprints …

Virtual machines are the basis of resource isolation in today's public clouds, yet the security
risks of entrusting that isolation to a cloud provider's hypervisor are substantial. Such …

Frequent Translation Lookaside Buffer (TLB) misses incur high performance and energy
costs due to page walks required for fetching the corresponding address translations …