Coarse-grained reconfigurable array (CGRA) has emerged as a promising hardware
accelerator due to the excellent balance between reconfigurability, performance, and energy …

Even though many optimization methods for CGRAs (Coarse-Grained Reconfigurable
Architectures) have been proposed, aggressive power optimization still remains a complex …

The building block computation system is constructed by stacking various chips three-
dimensionally. The stacked chips incorporate the same TCI IP (Through Chip Interface …

Body biasing is one of the critical techniques to realize more energy-efficient computing with
reconfigurable devices, such as coarse-grained reconfigurable architectures. Its benefit …

A building block computing system with inductive coupling Through Chip Interface (TCI)
consists of 3-D chip stack, each of which is small dedicated chips. By changing the …

Variable Pipeline Cool Mega Array (VPCMA) is a low power Coarse Grained
Reconfigurable Architecture (CGRA) based on the concept of CMA (Cool Mega Array). It …

Body biasing is one of the critical techniques to realize more energy-efficient computing with
reconfigurable devices, such as Coarse-Grained Reconfigurable Architectures (CGRAs). Its …

A building block computing system is consisting of multiple chips connecting with inductive
coupling wireless through chip interconnect. Like building Lego blocks, various types of …

論文抄録 CCSOTB2 は, 可変パイプライン構造の大規模 PE アレイを持つ粗粒度再構成リコン
フィギャラブルアクセラレータであり, パイプライン構造とボディバイアスの制御により高いエネルギー …

† 慶應義塾大学大学院 理工学研究科 223–8522 神奈川県横浜市港北区日吉 3–14–1 E-
mail:†{tkojima, hunga}@ am. ics. keio. ac. jp あらまし 粗粒度再構成可能アーキテクチャ CGRA …