A survey on fault injection methods of digital integrated circuits

M Eslami, B Ghavami, M Raji, A Mahani - Integration, 2020 - Elsevier
One of the most popular methods for reliability assessment of digital circuits is Fault Injection
(FI) in which the behavior of the circuit is simulated in presence of faults. In this paper, we …

A stochastic computational approach for accurate and efficient reliability evaluation

J Han, H Chen, J Liang, P Zhu, Z Yang… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
Reliability is fast becoming a major concern due to the nanometric scaling of CMOS
technology. Accurate analytical approaches for the reliability evaluation of logic circuits …

Efficient algorithms to accurately compute derating factors of digital circuits

H Asadi, MB Tahoori, M Fazeli, SG Miremadi - Microelectronics Reliability, 2012 - Elsevier
Fast, accurate, and detailed Soft Error Rate (SER) estimation of digital circuits is essential for
cost-efficient reliable design. A major step to accurately estimate a circuit SER is the …

CASSER: A closed-form analysis framework for statistical soft error rate

ACC Chang, RHM Huang… - IEEE Transactions on Very …, 2012 - ieeexplore.ieee.org
CMOS designs in the deep submicrometer era require statistical methods to accurately
estimate the circuit soft error rate (SER). However, process variation increases the …

MASkIt: Soft error rate estimation for combinational circuits

M Anglada, R Canal, JL Aragón… - 2016 IEEE 34th …, 2016 - ieeexplore.ieee.org
Integrated circuits are getting increasingly vulnerable to soft errors; as a consequence, soft
error rate (SER) estimation has become an important and very challenging goal. In this work …

Soft error rate reduction of combinational circuits using gate sizing in the presence of process variations

M Raji, B Ghavami - IEEE Transactions on Very Large Scale …, 2016 - ieeexplore.ieee.org
Soft errors in combinational logic circuits are emerging as a significant reliability concern for
nanoscale VLSI designs. This paper presents a novel sensitivity-based gate sizing …

Recurrent neural networks models for analyzing single and multiple transient faults in combinational circuits

R Farjaminezhad, S Safari, AME Moghadam - Microelectronics Journal, 2021 - Elsevier
Transient faults analysis is an important step in circuits designing flow. By a fast and
accurate scrutiny, it is possible to achieve a cost-effective and soft error tolerant system. In …

Soft error rate estimation for combinational logic in presence of single event multiple transients

R Rajaei, M Tabandeh, M Fazeli - Journal of Circuits, Systems and …, 2014 - World Scientific
Fast and accurate estimation of soft error rate in VLSI circuits is an essential step in a soft
error tolerant ASIC design. In order to have a cost effective protection against radiation …

Soft error rate estimation of combinational circuits based on vulnerability analysis

M Raji, H Pedram, B Ghavami - IET Computers & Digital …, 2015 - Wiley Online Library
Nanometer integrated circuits are getting increasingly vulnerable to soft errors and making
the soft error rate (SER) estimation an important challenge. In this study, a novel approach is …

Fast-yet-accurate statistical soft-error-rate analysis considering full-spectrum charge collection

HM Huang, CHP Wen - IEEE Design & Test, 2013 - ieeexplore.ieee.org
Soft errors are a growing concern in highly scaled CMOS technologies; estimating error
rates for a given design remains very challenging. This article presents a fast statistical soft …