Thickness-controlled black phosphorus tunnel field-effect transistor for low-power switches

S Kim, G Myeong, W Shin, H Lim, B Kim, T Jin… - Nature …, 2020 - nature.com
The continuous down-scaling of transistors has been the key to the successful development
of current information technology. However, with Moore's law reaching its limits, the …

Computing with ferroelectric FETs: Devices, models, systems, and applications

A Aziz, ET Breyer, A Chen, X Chen… - … , Automation & Test …, 2018 - ieeexplore.ieee.org
In this paper, we consider devices, circuits, and systems comprised of transistors with
integrated ferroelectrics. Said structures are actively being considered by various …

Two-dimensional cold electron transport for steep-slope transistors

M Liu, HN Jaiswal, S Shahi, S Wei, Y Fu, C Chang… - ACS …, 2021 - ACS Publications
Room-temperature Fermi–Dirac electron thermal excitation in conventional three-
dimensional (3D) or two-dimensional (2D) semiconductors generates hot electrons with a …

Fabrication and characterization of a novel Si line tunneling TFET with high drive current

W Cheng, R Liang, G Xu, G Yu, S Zhang… - IEEE Journal of the …, 2020 - ieeexplore.ieee.org
In this paper, an N-type silicon line tunneling TFET (LT-TFET) with an ultra-shallow N+
pocket was proposed. The pocket was formed by using the germanium preamorphization …

Influence of gate and channel engineering on multigate tunnel FETs: a review

R Dutta, SC Konar, N Paitya - Computational Advancement in …, 2020 - Springer
The continuous progress in the development of tunnel field-effect transistors (TFETs) by
replacing the conventional metal-oxide field-effect transistors is to satisfy the development of …

Sub-10 nm graphene nano-ribbon tunnel field-effect transistor

AMM Hammam, ME Schmidt, M Muruganathan… - Carbon, 2018 - Elsevier
We report a temperature independent subthreshold slope (SS) of∼ 47 mV/dec at low
temperature in a triple top gate graphene tunnel field-effect transistor (TFET). The outer …

Monolayer hexagonal boron nitride tunnel barrier contact for low-power black phosphorus heterojunction tunnel field-effect transistors

S Kim, G Myeong, J Park, K Watanabe, T Taniguchi… - Nano Letters, 2020 - ACS Publications
Transistor downscaling by Moore's law has facilitated drastic improvements in information
technology, but this trend cannot continue because power consumption issues have pushed …

Radiation study of TFET and JLFET-based devices and circuits: a comprehensive review on the device structure and sensitivity

K Aishwarya, B Lakshmi - Radiation Effects and Defects in Solids, 2023 - Taylor & Francis
All electronic devices when used in a radiation environment undergo significant changes in
their electrical properties. It is interesting to explore the effects of radiation, not only on …

Identifying atomically thin isolated-band channels for intrinsic steep-slope transistors by high-throughput study

H Qu, S Zhang, J Cao, Z Wu, Y Chai, W Li, LJ Li, W Ren… - Science Bulletin, 2024 - Elsevier
Developing low-power FETs holds significant importance in advancing logic circuits,
especially as the feature size of MOSFETs approaches sub-10 nanometers. However, this …

Negative capacitance gate-all-around PZT silicon nanowire with high-K/metal gate MFIS structure for low SS and high I on/I off

V Kumar, RK Maurya, G Rawat… - Semiconductor …, 2023 - iopscience.iop.org
In the present work, a high-k dielectric hafnium dioxide and lead zirconate titanate (PZT)
have been incorporated as a ferroelectric (FE) layer in the gate stack. The I on/I off ratio …