Evaluation of low power consumption network on chip routing architecture

TS Arulananth, M Baskar, US SM, R Thiagarajan… - Microprocessors and …, 2021 - Elsevier
Abstract Network on Chip (NoC) is growing technology whereby multiprocessor state
interconnect patterns are formed. NoC technology is adapted to support a variety of …

Architectural techniques for improving the power consumption of noc-based cmps: A case study of cache and network layer

E Ofori-Attah, W Bhebhe… - Journal of Low Power …, 2017 - mdpi.com
The disparity between memory and CPU have been ameliorated by the introduction of
Network-on-Chip-based Chip-Multiprocessors (NoC-based CMPS). However, power …

A survey of low power NoC design techniques

E Ofori-Attah, MO Agyeman - … of the 2Nd International Workshop on …, 2017 - dl.acm.org
As we usher into the billion-transistor era, NoC which was once deemed as the solution is
defecting due to high power consumption in its components. Several techniques have been …

Signature codes for energy-efficient data movement in on-chip networks

M Dehyadegari - Journal of Computing and Security, 2020 - jcomsec.ui.ac.ir
On-chip networks provide a scalable infrastructure for moving data among cores in many-
core systems. In future technologies, significant amounts of dynamic energy are dissipated …

A survey of system level power management schemes in the dark-silicon era for many-core architectures

E Ofori-Attah, X Wang… - … on Industrial Networks …, 2018 - pure.northampton.ac.uk
Abstract Power consumption in Complementary Metal Oxide Semiconductor (CMOS)
technology has escalated to a point that only a fractional part of many-core chips can be …

[PDF][PDF] EFFICIENT AGEING-AWARE TECHNIQUES FOR EMERGING LOW POWER MULTI-CORE SYSTEMS

E OFORI-ATTAH - 2023 - pure.northampton.ac.uk
The rise in power consumption due to the integration of more resources into a single chip
poses a significant threat to performance and resource lifespan in the field of technology. As …

[PDF][PDF] A survey of recent contributions of high performance NoC architectures

E Ofori-Attah, M Opoku Agyeman - 2016 - nectar.northampton.ac.uk
The Network-on-Chip (NoC) paradigm has been herald as the solution to the
communication limitation that System-On-Chip (SoC) poses. However, power consumption …

[图书][B] Vibration of nonlocal carbon nanotubes and graphene nanoplates

F Hache - 2018 - search.proquest.com
This thesis deals with the analytical study of vibration of carbon nanotubes and graphene
plates. First, a brief overview of the traditional Bresse-Timoshenko models for thick beams …

Analyse des sentiments et des émotions de commentaires complexes en langue française

S Pecore - 2019 - theses.hal.science
Les définitions des mots «sentiment»,«opinion» et «émotion» sont toujours très vagues
comme l'atteste aussi le dictionnaire qui semble expliquer un mot en utilisant le deux autres …

Circuitos e interconexiones tolerantes a fallas para dispositivos biomédicos implantables. Documento 1

R García-Ramírez, A Chacón-Rodríguez… - 2020 - repositoriotec.tec.ac.cr
Los dispositivos médicos implantables (IMDs) son sistemas críticos para la seguridad con
requerimientos de potencia muy bajos, los cuales se utilizan para el tratamiento a largo …