Navigating the landscape for real-time localization and mapping for robotics and virtual and augmented reality

S Saeedi, B Bodin, H Wagstaff, A Nisbet… - Proceedings of the …, 2018 - ieeexplore.ieee.org
Visual understanding of 3-D environments in real time, at low power, is a huge
computational challenge. Often referred to as simultaneous localization and mapping …

Hardware-accelerated cross-architecture full-system virtualization

T Spink, H Wagstaff, B Franke - ACM Transactions on Architecture and …, 2016 - dl.acm.org
Hardware virtualization solutions provide users with benefits ranging from application
isolation through server consolidation to improved disaster recovery and faster server …

An Instruction Inflation Analyzing Framework for Dynamic Binary Translators

B Xie, Y Yan, C Yan, S Tao, Z Zhang, X Li… - ACM Transactions on …, 2024 - dl.acm.org
Dynamic binary translators (DBTs) are widely used to migrate applications between different
instruction set architectures (ISAs). Despite extensive research to improve DBT performance …

MFHBT: Hybrid Binary Translation System with Multi-stage Feedback Powered by LLVM

Z Yang, X Chen, L Wang, W Guo, D Zhao… - … on Advanced Parallel …, 2023 - Springer
The shortage of applications has become a major concern for new Instruction Set
Architecture (ISA). Binary translation is a common solution to overcome this challenge …

SimBench: A portable benchmarking methodology for full-system simulators

H Wagstaff, B Bodin, T Spink… - 2017 IEEE International …, 2017 - ieeexplore.ieee.org
Full-system simulators are increasingly finding their way into the consumer space for the
purposes of backwards compatibility and hardware emulation (eg for games consoles). For …

High speed cycle-approximate simulation of embedded cache-incoherent and coherent chip-multiprocessors

C Thompson, M Gould, N Topham - International Journal of Parallel …, 2018 - Springer
The increasing density of silicon processes, coupled with the development of ever more
energy and space efficient embedded core designs, has led to multi-processor system-on …

Efficient asynchronous interrupt handling in a full-system instruction set simulator

T Spink, H Wagstaff, B Franke - Proceedings of the 17th ACM SIGPLAN …, 2016 - dl.acm.org
Instruction set simulators (ISS) have many uses in embedded software and hardware
development and are typically based on dynamic binary translation (DBT), where frequently …

Efficient cross-architecture hardware virtualisation

T Spink - 2017 - era.ed.ac.uk
Hardware virtualisation is the provision of an isolated virtual environment that represents
real physical hardware. It enables operating systems, or other system-level software (the …

From high level architecture descriptions to fast instruction set simulators

H Wagstaff - 2015 - era.ed.ac.uk
As computer systems become increasingly complex and diverse, so too do the architectures
they implement. This leads to an increase in complexity in the tools used to design new …

Simulation methodologies for mobile GPUs

K Kaszyk - 2022 - era.ed.ac.uk
GPUs critically rely on a complex system software stack comprising kernel-and user-space
drivers and JIT compilers. Yet, existing GPU simulators typically abstract away details of the …