An effective subsuperpixel-based approach for background subtraction

YQ Chen, ZL Sun, KM Lam - IEEE Transactions on Industrial …, 2019 - ieeexplore.ieee.org
How to achieve competitive accuracy and less computation time simultaneously for
background estimation is still an intractable task. In this paper, an effective background …

Image processing using FPGAs

DG Bailey - Journal of Imaging, 2019 - mdpi.com
Nine articles have been published in this Special Issue on image processing using field
programmable gate arrays (FPGAs). The papers address a diverse range of topics relating …

[HTML][HTML] Line rate botnet detection with SmartNIC-embedded feature extraction

M Patetta, S Secci, S Taktak - Computer Networks, 2024 - Elsevier
Botnets pose a significant threat in network security, exacerbated by the massive adoption of
vulnerable Internet-of-Things (IoT) devices. In response to that, great research effort has …

RETRACTED ARTICLE: FPGA-based reflection image removal using cognitive neural networks

BK Saptalakar, MV Latte - Applied Nanoscience, 2023 - Springer
There is an enormous increase in the resource usage and certain process is required to
satisfy the user requirement. Thus, there is a process integration on IoT and data analytics …

Hardware and software co-design for object detection with modified vibe algorithm and particle filtering based object tracking

YM Wijesinghe, JG Samarawickrama… - 2019 14th Conference …, 2019 - ieeexplore.ieee.org
This paper describes a hardware and software codesign approach for object detection and
tracking algorithm which is based on modified ViBe background subtraction method and …

FPGA-based Hardware Software Co-design to Accelerate Brain Tumour Segmentation

V Rayapati, RKR Gogireddy, AK Gandi… - … on Circuits and …, 2024 - ieeexplore.ieee.org
Brain tumors are a major concern, being the leading cause of cancer-related deaths.
Computer-aided diagnosis significantly reduces the workload on physicians and improves …

Hardware-software partitioning using three-level hybrid algorithm for system-on-chip platform

TR Xian, ZA Halim, CC Leong, TJ Gim - Bulletin of Electrical Engineering …, 2021 - beei.org
This study discusses hardware-software partitioning, which is useful for system-on-chip
(SoC) applications. Hardware-software partitioning attempts to obtain the lowest execution …

[引用][C] Design of a vision enabled wireless sensor node

WYM Wijesinghe - 2020