[图书][B] Processor description languages

P Mishra, N Dutt - 2011 - books.google.com
Efficient design of embedded processors plays a critical role in embedded systems design.
Processor description languages and their associated specification, exploration and rapid …

ArchC: A SystemC-based architecture description language

S Rigo, G Araujo, M Bartholomeu… - 16th Symposium on …, 2004 - ieeexplore.ieee.org
This paper presents an architecture description language (ADL) called ArchC, which is an
open-source SystemC-based language that is specialized for processor architecture …

A multiprocessing approach to accelerate retargetable and portable dynamic-compiled instruction-set simulation

W Qin, J D'Errico, X Zhu - … of the 4th international conference on …, 2006 - dl.acm.org
Traditionally, instruction-set simulators (ISS's) are sequential programs running on individual
processors. Besides the advances of simulation techniques, ISS's have been mainly driven …

The Vienna Architecture Description Language

S Himmelbauer, C Hochrainer, B Huber… - arXiv preprint arXiv …, 2024 - arxiv.org
The Vienna Architecture Description Language (VADL) is a powerful processor description
language (PDL) that enables the concise formal specification of processor architectures. By …

Constructing portable compiled instruction-set simulators-an ADL-driven approach

J D'Errico, W Qin - Proceedings of the Design Automation & …, 2006 - ieeexplore.ieee.org
Instruction set simulators are common tools used for the development of new architectures
and embedded software among countless other functions. This paper presents a framework …

DSP instruction set simulation

F Brandner, N Horspool, A Krall - Handbook of Signal Processing Systems, 2013 - Springer
An instruction set simulator is an important tool for system architects and for software
developers. However, when implementing a simulator, there are many choices which can be …

ADL-based specification of implementation styles for functional simulators

DA Penry, KD Cahill - International Journal of Parallel Programming, 2013 - Springer
Functional simulators find widespread use as subsystems within microarchitectural
simulators. The speed of a functional simulator is strongly influenced by its implementation …

[PDF][PDF] Cycle-Accurate simulator generator for the VADL processor description language

H Schützenhöfer - 2020 - scholar.archive.org
A simulator is a software that can mimic the execution of a program, which has been created
for a different platform or architecture. While a simulator can be used for example to run a …

[PDF][PDF] Processor centric specification and modeling of MPSoCs using ArchC

C Araujo, E Barros, R Azevedo… - Proceedings of the Forum …, 2005 - researchgate.net
In this paper is presented a processor centric approach for the modeling and simulation of
multi-processors platforms for SoC (MPSoC). It describes how the ArchC architecture …

Optimizing a retargetable compiled simulator to achieve near-native performance

MS Garcia, R Azevedo, S Rigo - 2010 11th Symposium on …, 2010 - ieeexplore.ieee.org
The design of new architectures can be simplified with the use of retargetable instruction set
simulation tools, which can validate the decisions in the design exploration cycle with high …