Two-dimensional weight-constrained codes for crossbar resistive memory arrays

CD Nguyen, K Cai - IEEE Communications Letters, 2021 - ieeexplore.ieee.org
This letter proposes novel methods for designing two-dimensional (2-D) weight-constrained
codes for reducing the parasitic currents in the crossbar resistive memory array. In particular …

Endurance-limited memories: Capacity and codes

YM Chee, M Horovitz, A Vardy… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Resistive memories, such as phase change memories and resistive random access
memories have attracted significant attention in recent years due to their better scalability …

Coding for Write ℓ-step-up Memories

YM Chee, HM Kiah, AJH Vinck… - 2019 IEEE International …, 2019 - ieeexplore.ieee.org
In this work, we propose and study a new class of non-binary rewriting codes, called write ℓ-
step-up memories (WℓM) codes. From an information-theoretic point of view, this coding …

Endurance-limited memories with informed decoder

YM Chee, M Horovitz, A Vardy… - 2019 IEEE Information …, 2019 - ieeexplore.ieee.org
Non-volatile resistive memories, such as phase change memories and resistive random
access memories, have attracted significant attention recently due to their scalability, speed …

On efficient designing of protograph LDPC codes

HG Nguyen, NX Pham, TP Nguyen… - Journal of Science and …, 2021 - ict.jst.udn.vn
This paper designs two protograph LDPC codes with code-rate $ R> 1/2$. A simple method
using the protograph extrinsic information transfer (PEXIT) to design the codes with a low …