Design of FinFET based low power, high speed hybrid decoder for SRAM
EJ Leavline, S Sujitha - Microelectronics Journal, 2022 - Elsevier
This paper proposes a novel FinFET based hybrid logic design for line decoders, which
comprises of transmission gate logic (TGL), modified gate diffusion input (MGDI) logic and …
comprises of transmission gate logic (TGL), modified gate diffusion input (MGDI) logic and …
[PDF][PDF] IMPLEMENTATION OF HIGH-SPEED FIR FILTER WITH DISTINCT PARALLEL ADDERS
Numerical impulse response Wireless sensor networks (WSNs) and signal processing both
frequently use FIR filters. The multipliers used in the design of FIR filter topologies are …
frequently use FIR filters. The multipliers used in the design of FIR filter topologies are …