BACKGROUND In computer hardware, shared memory typically refers to a large block of
random access memory that can be accessed by several different central processing units …

BACKGROUND As mobile phones, portable media players, personal digital assistants, and
other mobile devices have proliferated, manu facturers have continually improved the …

US7831778B2 - Shared nonvolatile memory architecture - Google Patents US7831778B2 -
Shared nonvolatile memory architecture - Google Patents Shared nonvolatile memory …

(57) ABSTRACT A multi-port memory device including a plurality of ports, a plurality of banks
and a plurality of bank controllers, wherein all of the bank controllers share all of the ports …

A pipe latch circuit comprises a reset signal generating unit which receives a read-write flag
signal and a read period signal and generates a reset signal, wherein the reset signal is …

BACKGROUND Embodiments of present invention relate to memory in general and, in
particular, to presetable random access memory. In electrical circuits, it is common to store …

Embodiments provide a write operation circuit, a semicon ductor memory, and write
operation method. The write operation circuit includes: a data determination module that …

A semiconductor device includes a latch control circuit configured to generate a latch input
signal, which is enabled in response to a latency signal, and configured to generate a latch …

A gate drive circuit may include a latch circuit, a first transmission gate, and a second
transmission gate. The first transmission gate and the second transmission gate may both be …

It is therefore an objective of the invention to pro vide a device and a method for transmitting
and receiving data simultaneously including clock data and packet information. 0007. The …