A survey on fault injection methods of digital integrated circuits

M Eslami, B Ghavami, M Raji, A Mahani - Integration, 2020 - Elsevier
One of the most popular methods for reliability assessment of digital circuits is Fault Injection
(FI) in which the behavior of the circuit is simulated in presence of faults. In this paper, we …

Simulating quantum computation by contracting tensor networks

IL Markov, Y Shi - SIAM Journal on Computing, 2008 - SIAM
The treewidth of a graph is a useful combinatorial measure of how close the graph is to a
tree. We prove that a quantum circuit with T gates whose underlying graph has a treewidth d …

AI/ML algorithms and applications in VLSI design and technology

D Amuru, A Zahra, HV Vudumula, PK Cherupally… - Integration, 2023 - Elsevier
An evident challenge ahead for the integrated circuit (IC) industry is the investigation and
development of methods to reduce the design complexity ensuing from growing process …

Design and evaluation of an ultra-area-efficient fault-tolerant QCA full adder

A Roohi, RF DeMara, N Khoshavi - Microelectronics Journal, 2015 - Elsevier
Quantum-dot cellular automata (QCA) has been studied extensively as a promising
switching technology at nanoscale level. Despite several potential advantages of QCA …

Reliable on-chip systems in the nano-era: Lessons learnt and future trends

J Henkel, L Bauer, N Dutt, P Gupta, S Nassif… - Proceedings of the 50th …, 2013 - dl.acm.org
Reliability concerns due to technology scaling have been a major focus of researchers and
designers for several technology nodes. Therefore, many new techniques for enhancing and …

[PDF][PDF] Transistor-Level Defect Tolerant Digital System Design at the Nanoscale

AH El-Maleh, A Al-Yamani, BM Al-Hashimi - Research Proposal Submitted …, 2007 - Citeseer
Nanotechnology-based fabrication is expected to offer the extra density and potential
performance to take electronic circuits beyond the scaling limits reached by CMOS …

An efficient filtering based approach improving LSB image steganography using status bit along with AES cryptography

MR Islam, A Siddiqa, MP Uddin… - … , Electronics & Vision …, 2014 - ieeexplore.ieee.org
In Steganography, the total message will be invisible into a cover media such as text, audio,
video, and image in which attackers don't have any idea about the original message that the …

Probabilistic transfer matrices in symbolic reliability analysis of logic circuits

S Krishnaswamy, GF Viamontes, IL Markov… - ACM Transactions on …, 2008 - dl.acm.org
We propose the probabilistic transfer matrix (PTM) framework to capture nondeterministic
behavior in logic circuits. PTMs provide a concise description of both normal and faulty …

Multiple transient faults in combinational and sequential circuits: A systematic approach

N Miskov-Zivanov, D Marculescu - IEEE Transactions on …, 2010 - ieeexplore.ieee.org
Transient faults in logic circuits are becoming an important reliability concern for future
technology nodes. Radiation-induced faults have received significant attention in recent …

MARS-C: modeling and reduction of soft errors in combinational circuits

N Miskov-Zivanov, D Marculescu - Proceedings of the 43rd annual …, 2006 - dl.acm.org
Due to the shrinking of feature size and reduction in supply voltages, nanoscale circuits
have become more susceptible to radiation induced transient faults. In this paper, we …