Semiconductor device with curved conductive lines and method of forming the same

CK Hsu, MC Yew, SS Yeh, CC Yang, PY Lin… - US Patent …, 2024 - Google Patents
H01L23/538—Arrangements for conducting electric current within the device in operation
from one component to another, ie interconnections, eg wires, lead frames the …

Stacking via structures for stress reduction

SS Yeh, CC Yang, CH Wang, PY Lin, S Jeng… - US Patent …, 2023 - Google Patents
A method includes forming a first dielectric layer, forming a first redistribution line comprising
a first via extending into the first dielectric layer, and a first trace over the first dielectric layer …

Packaged electronic system formed by electrically connected and galvanically isolated dice

D Paci, S Adorno, M Del Sarto, F Cerini… - US Patent App. 17 …, 2022 - Google Patents
(57) ABSTRACT A packaged electronic system having a support formed by an insulating
organic substrate housing a buried conductive region that is floating. A first die is fixed to the …

Semiconductor device with curved conductive lines and method of forming the same

CK Hsu, MC Yew, SS Yeh, CC Yang, PY Lin… - US Patent …, 2023 - Google Patents
An embodiment is package structure including a first integrated circuit die, a redistribution
structure bonded to the first integrated circuit die, the redistribution structure including a first …

Package structure and method

SS Yeh, CC Yang, CH Wang, CK Hsu, PY Lin… - US Patent …, 2024 - Google Patents
A package structure and a method of forming the same are provided. The package structure
includes an integrated circuit die and a redistribution structure bonded to the integrated …

Eccentric via structures for stress reduction

SS Yeh, CC Yang, CK Hsu, PY Lin, S Jeng… - US Patent …, 2024 - Google Patents
A method includes forming a first dielectric layer, forming a first redistribution line including a
first via extending into the first dielectric layer, and a first trace over the first dielectric layer …