As the internet of things (IoT) continues to expand rapidly, the significance of its security
concerns has grown in recent years. To address these concerns, physical unclonable …

Multiplier Design using Machine Learning Alogorithms for Energy Efficiency Page 1 Journal
of VLSI circuits and systems, , ISSN 2582-1458 28 RESEARCH ARTICLE WWW.VLSIJOURNAL.COM …

When an image captured in low-light, it gets the low visibility. To overcome the low visibility
of the image, some operations are to be performed. But in this paper image enhancement is …

In this section, a various levelled picture matting method is utilized to extract veins from
fundus pictures. All the more explicitly, a various levelled methodology is joined into the …

Abstract Carry Select Adder (CSLA) is an essentially utilized adder on account of its higher
computational speed. CSLA is utilized in the space of incorporation frameworks. This paper …

The reduced complexity design of the IIR filter is discussed in this paper. The use of the IIR
filter has been variably increasing during the present times and they are real time …

This paper presents power analysis of the seven full adder cells reported as having a low
PDP (Power Delay Product), by means of speed, power consumption and area. These full …

Since last few years, the tiny size of MOSFET, that is less than tens of nanometers, created
some operational problems such as increased gate-oxide leakage, amplified junction …

A latch is used to store single bit information. It is a level triggered device. These are the
building blocks for sequential circuits. The basic working of D-Latch is that input data will be …

Fundamental Digital Module Realization Using RTL Design for Quantum Mechanics Page 1 1
Journal of VLSI circuits and systems, , ISSN 2582-1458 RESEARCH ARTICLE WWW.VLSIJOURNAL.COM …