Integrating multiple state‐of‐the‐art computer‐aided design tools in microelectronics circuit design classes

K Abugharbieh, HW Marar - Computer Applications in …, 2019 - Wiley Online Library
Demand for microelectronics products has seen a recent explosion due to their increased
adaption in high‐performance data storage, networking, and Internet of Things applications …

Collaborative virtual laboratory environments with hardware in the loop

Z Zhang, M Zhang, Y Chang, ES Aziz, SK Esche… - … -Physical Laboratories in …, 2018 - Springer
Over the last decade, the research community has expanded substantial efforts aiming at
designing, agreeing on, and rolling out technical standards and powerful universal …

Enhancing PDK Device Library Analysis with XDIRCELL: A Cell-Level Comparison

J Gautam, V Sao, F Jalel… - 2024 IEEE Region 10 …, 2024 - ieeexplore.ieee.org
This paper presents a Unix shell script designed to automate the comparison of cell libraries
between different Process Design Kits (PDKs) in a CADENCE® environment. The script …

A distributed VHDL compiler and simulator accessible from the web

M Dasygenis - 2014 24th International Workshop on Power and …, 2014 - ieeexplore.ieee.org
During the previous years, web based applications have gained prominence as an effective
paradigm for an increase in worker's office productivity. Occasionally, companies develop …

VLSI Education for Computer Science and Engineering Students through Virtual Labs

R Dubey, H Wardhan… - 2012 IEEE Fourth …, 2012 - ieeexplore.ieee.org
The paper reports of a novel approach of teaching VLSI to computer science students
through the use of Virtual laboratory. It formalizes the notion of hierarchical design of …

A Case Study in VLSI Education during the COVID-19 Pandemic

D Atkin, O Yadid-Pecht - Proceedings of the Canadian …, 2023 - ojs.library.queensu.ca
COVID-19 presented numerous challenges to education. Many papers have been published
detailing professors' successes and learning experiences in adapting their courses to the …

Design, Layout and Simulation of 8 bit Arithmetic and Logic Circuits Pad frame using C5 Process for deep submicron CMOS

PK Rai, S Srivastava, A Johri - 2018 International Conference …, 2018 - ieeexplore.ieee.org
A critical component of the microprocessor, the core component of central processing unit.
Arithmetic and logic circuits comprises the combinational logic that implements logic …

Maintaining availability of replicated data in partition-prone networks

N Natarajan, K Kant - … on the Management of Replicated Data, 1990 - ieeexplore.ieee.org
The results of investigations into the design of replica control protocols for maintaining
availability of replicated data are discussed. Protocols that tolerate not only site failures, but …

[PDF][PDF] VLSI Design and Verification of a CMOS Inverter Using the Tanner EDA: A Case Study

N Zhang, JFR Rochac, ET Ososanya, WH Mahmoud… - The 7th International Multi … - iiis.org
Although the Tanner EDA has been widely used in many universities, there is lack of a
shareable publication, document, or tutoring video on VLSI design and verification. Few …

Virtual VLSI Laboratory for Computer Science Students: Erudite and Illusive

SR Chowdhury, S Kode - 2012 IEEE 12th International …, 2012 - ieeexplore.ieee.org
The paper reports a novel approach of self teaching Very Large Scale Integration (VLSI) to
Computer Science students through the use of a Virtual laboratory. It formalizes the notion of …