Digital technologies as enablers of supply chain sustainability in an emerging economy

M Akbari, JL Hopkins - Operations Management Research, 2022 - Springer
Vietnam is a country with significant potential for growth as a global centre for
manufacturing, as supply chains look to reduce their over-reliance on China in the aftermath …

A survey on the security of wired, wireless, and 3D network-on-chips

A Sarihi, A Patooghy, A Khalid, M Hasanzadeh… - IEEE …, 2021 - ieeexplore.ieee.org
Network-on-Chips (NoCs) have been widely used as a scalable communication solution in
the design of multiprocessor system-on-chips (MPSoCs). NoCs enable communications …

GreenMM: energy efficient GPU matrix multiplication through undervolting

H Zamani, Y Liu, D Tripathy, L Bhuyan… - Proceedings of the ACM …, 2019 - dl.acm.org
The current trend of ever-increasing performance in scientific applications comes with
tremendous growth in energy consumption. In this paper, we present GreenMM framework …

Load balancing-oriented fault-tolerant NoC design

T Tan, X Chen, C Li, J Lu - … Test Conference in Asia (ITC-Asia), 2024 - ieeexplore.ieee.org
Network-on-Chip (NoC) has been widely applied in modern chip multiprocessors due to its
high bandwidth and scalability. However, as technology advances to the nanometer scale …

Addressing Benign and Malicious Crosstalk in Modern System-on-Chips

A Patooghy, M Elahi, MF Torkaman… - IEEE …, 2023 - ieeexplore.ieee.org
In this study, we investigate the effects of intentional crosstalk noise on modern Multi-
Processor System-on-Chips (MPSoCs). We demonstrate the potential for an adversary to …

WiSE: When Learning Assists Resolving STT-MRAM Efficiency Challenges

A Salahvarzi, M Khosroanjam… - … on Emerging Topics …, 2022 - ieeexplore.ieee.org
Spin Transfer Torque Magnetic RAM (STT-MRAM) is one of the most promising on-chip
technologies, which delivers high density, non-volatility, and near-zero leakage power …

Your hardware is all wired up! attacking network-on-chips via crosstalk channel

A Patooghy, MF Torkaman, M Elahi - Proceedings of the 12th …, 2019 - dl.acm.org
Adjacent parallel wires appearing in the fabrication of 2D and 3D stacked integrated chips
can be leveraged as a major source of crosstalk noise. A crosstalk may induce either …

Mosaic-3C1S: A low overhead crosstalk suppression scheme for rectangular TSV array

X Cui, C Wei, X Feng, X Cui - IEEE Transactions on Computer …, 2021 - ieeexplore.ieee.org
The through silicon via (TSV) is one of the important enabling technologies of stacked 3-D
ICs. However, the crosstalk is generated when signals are transmitted through the closely …

DR: Overhead efficient RLC crosstalk avoidance code

Z Shirmohammadi, HZ Sabzi - 2018 8th International …, 2018 - ieeexplore.ieee.org
Recently proposed crosstalk avoidance coding mechanisms (CACs) are not able to prevent
inductance effects. For solving this problem, an efficient numerical-based CAC mechanism …

[HTML][HTML] Priority Filt: A Way to Increase Network Reliability on Chip against Soft Error by Considering Multiple Bit Upset

Z Shirmohammadi, M Farmani… - … Intelligence in Electrical …, 2021 - isee.ui.ac.ir
One of the most important challenges that threaten the reliability of network-based chips is
soft errors. These problems occur mainly in buffers of on the chip networks. The shrinking …