Gate-all-around (GAA) method and devices

SY Wu, TC Lin, KH Pan - US Patent 11,101,359, 2021 - Google Patents
(57) ABSTRACT A method of manufacturing a device includes forming a plurality of stacks of
alternating layers on a substrate, constructing a plurality of nanosheets from the plurality of …

Nanosheet transistor with dual inner airgap spacers

R Xie, K Cheng, CC Yeh, T Yamashita - US Patent 10,566,438, 2020 - Google Patents
(57) ABSTRACT A substrate structure includes a set of nanosheet layers stacked upon a
substrate. The substrate structure includes a p-channel region and an n-channel region. The …

Reduced source/drain coupling for CFET

R Xie, A Reznicek, C Park, CC Yeh - US Patent 11,164,793, 2021 - Google Patents
(57) ABSTRACT A method is presented for reducing capacitance coupling. The method
includes forming a nanosheet stack including alternating layers of a first material and a …

Multi-gate device and related methods

CT Chung, CW Tsai, KL Cheng - US Patent 10,879,379, 2020 - Google Patents
Multi-gate semiconductor devices and methods for forming thereof including forming air
gaps between the gate and the adjacent source/drain features. A first fin element including a …

Complementary field-effect transistors

R Xie, A Reznicek, J Zhang, J Wang - US Patent 11,164,792, 2021 - Google Patents
(57) ABSTRACT A semiconductor structure includes a first field-effect tran sistor disposed on
a substrate. The first field-effect transistor includes a stack of nanosheet layers, a first gate …

Thin-film transistor structures with gas spacer

TW LaJoie, AA Sharma, J Alzate-vinasco… - US Patent …, 2022 - Google Patents
An integrated circuit includes a base, a first transistor structure on or above the base, and a
second transistor structure on or above the base, where the second transistor structure is …

Architecture of N and P transistors superposed with canal structure formed of nanowires

S Barraud, JP Colinge, B Previtali - US Patent 11,152,360, 2021 - Google Patents
Implementation of a device with stacked transistors com prising: a first transistor of a first
type, in particular N or P, the first transistor having a channel formed in one or more first semi …

Stacked field effect transistors with reduced coupling effect

R Xie, CC Yeh, D Guo, A Reznicek - US Patent 11,069,684, 2021 - Google Patents
(57) ABSTRACT A semiconductor structure includes a first field-effect tran sistor disposed on
a substrate. The first field-effect transistor includes a first metal gate, and a first source/drain …

Threshold voltage adjustment by inner spacer material selection

T Ando, J Zhang, CH Lee, P Hashemi - US Patent 11,037,832, 2021 - Google Patents
Semiconductor devices and methods of forming the same include partially etching sacrificial
layers in a first stack of alternating sacrificial layers and channel layers to form first recesses …

Method of making six transistor SRAM cell using connections between 3D transistor stacks

MI Gardner, HJ Fulford - US Patent 11,342,339, 2022 - Google Patents
(57) ABSTRACT A method of fabricating a semiconductor device includes forming a first
stack of first transistor structures on a substrate, and forming a second stack of second …