In this paper, we present a survey of recent works in developing neuromorphic or neuro-
inspired hardware systems. In particular, we focus on those systems which can either learn …

When mismatches are present in a dynamic comparator, due to internal positive feedback
and transient response, it is always challenging to analytically predict the input-referred …

A novel time-domain bulk-tuned offset cancellation technique is applied to a low-power high-
precision dynamic comparator to reduce its input-referred offset with minimal additional …

This paper presents a 10-bit successive approximation analog-to-digital converter (ADC)
that operates at an ultralow voltage of 0.3 V and can be applied to biomedical implants. The …

A novel approach is proposed and discussed for designing CMOS double-tail dynamic
comparator using the bulk-driven method. The bulk-driven method proposed thus far for low …

Self-powered monitoring refers to a signal processing technique where the computational
power is harvested directly from the signal being monitored. In this paper, we present the …

Low‐voltage high‐precision comparators are the main building blocks of many low‐power
mixed‐mode electronic devices. In this paper, a rail‐to‐rail high‐precision comparator is …

This paper presents the system architecture, modeling, and design constraints of a wireless
chip-to-chip-communication transceiver as a low-power alternative to wireline links, such as …

In order to diminish circuit complexity and power dissipation, the simple configuration of the
dynamic latch comparator is revisited. This paper proposes and analyzes a comparator that …

Design of high speed low power comparators are required to build an efficient analog to
digital converters (ADCs). This paper mainly focuses on the preamplifier positive feedback …