Data processing system having integrated pipelined array data processor

M Vorbach, J Becker, M Weinhardt… - US Patent …, 2015 - Google Patents
First worldwide family litigation filed litigation Critical https://patents. darts-ip. com/? family=
52813789&utm_source= google_patent&utm_medium= platform_link&utm_campaign …

Multiprocessor speculation mechanism for efficiently managing multiple barrier operations

GL Guthrie, RK Arimilli, JS Dodson… - US Patent …, 2003 - Google Patents
Disclosed is a method of operation within a processor that permits load instructions to be
issued speculatively. An instruction Sequence is received that includes multiple bar rier …

Methods and systems for transferring data between a processing device and external devices

M Vorbach, V Baumgarte, F May, A Nuckel - US Patent 9,411,532, 2016 - Google Patents
Int. Cl. An array data processor employs a plurality of address gen G06F 3/00(2006.01)
erators for communicating between groups of the data pro G06F5/00(2006.01) cessors and …

Microprocessor reservation mechanism for a hashed address system

RK Arimilli, RA Cargnoni, GL Guthrie… - US Patent …, 2004 - Google Patents
The present invention generally relates to computer Systems, Specifically to computer
Systems having caches in the memory hierarchy, and more particularly to a method of …

Conditional synchronization mechanisms allowing multiple store operations to become visible while a flagged memory location is owned and remains unchanged

MS Moir, RE Cypher, PN Loewenstein - US Patent 7,480,771, 2009 - Google Patents
We propose a class of mechanisms to support a new style of synchronization that offers
simple and efficient solutions to several existing problems for which existing Solutions are …

Configurable logic integrated circuit having a multidimensional structure of configurable elements

M Vorbach, A Nuckel - US Patent 9,690,747, 2017 - Google Patents
US9690747B2 - Configurable logic integrated circuit having a multidimensional structure of
configurable elements - Google Patents US9690747B2 - Configurable logic integrated circuit …

Method and apparatus for creating a virtual data copy

AA Kekre, JA Colgrove, O Kiselev, RS Karr… - US Patent …, 2004 - Google Patents
(21) App 9(57) ABSTRACT (22) Filed: May 10, 2002 A virtual copy of data Stored in a first
memory is created in (51) Int. Cl................................................. G06F 12/16 a Second memory …

Data processing system, cache, and method that select a castout victim in response to the latencies of memory copies of cached data

RK Arimilli, LB Arimilli, JS Fields Jr, S Ghai - US Patent 6,408,362, 2002 - Google Patents
To overcome the above-noted and other shortcomings of the prior art, the present invention
introduces the concept of storing, in association With cached data, an indication of the …

Mechanism for handling load lock/store conditional primitives in directory-based distributed shared memory multiprocessors

MC Mattina, C Ramey, B Jung, J Leonard - US Patent 7,620,954, 2009 - Google Patents
Each processor in a distributed shared memory system has an associated memory and a
coherence directory. The processor that controls a memory is the Home processor. Under …

Conditionally accessible cache memory

A Mandler - US Patent App. 10/791,083, 2005 - Google Patents
US20050198442A1 - Conditionally accessible cache memory - Google Patents
US20050198442A1 - Conditionally accessible cache memory - Google Patents …