Power-gating is the most promising run-time technique in order to reduce leakage currents in sub-100nm CMOS devices but its application is associated with numerous problems …
L Kruse - Ausgezeichnete Informatikdissertationen 2001, 2003 - dl.gi.de
Die stetig steigende Komplexität integrierter Schaltungen führt zu einer zunehmenden Bedeutung eines Verlustleistung reduzierenden Designprozesses. In dieser Arbeit sind …
S Rosinger, K Schroder, W Nebel - 2009 12th Euromicro …, 2009 - ieeexplore.ieee.org
Different power management techniques have been developed to target leakage-reduction at runtime of a design by orders of magnitude. To advance an optimization, different power …
F Poppen, W Nebel - SNUG Europe, 2001 - academia.edu
SoC designer face two main problems nowadays. Firstly, the complexity of ASICs is expected to double every 18 months as Moore's Law did not loose its correctness yet …
SoC designers face two main problems nowadays. First, the complexity of ASICs is doubling every 18 months, following Moore's Law, while the productivity of designers evolves at a …
AK Dutta, A El-Sayed - … Journal of Research and Reviews in …, 2011 - researchgate.net
The concept of Intuitionstic Fuzzy sets (IFS), which is generation of the concept of a Fuzzy Set, has been introduced by k. Atanassov. In this paper, a new method of search using the …