[PDF][PDF] Design and analog VLSI implementation of neural network architecture for signal processing

SL Pinjare - European Journal of Scientific Research, 2009 - researchgate.net
Biological systems process the analog signals like image and sound efficiently. To process
the information the way biological systems do, we make use of Artificial Neural Networks …

A circuit architecture for analog on-chip back propagation learning with local learning rate adaptation

GM Bo, DD Caviglia, H Chiblé, M Valle - Analog Integrated Circuits and …, 1999 - Springer
In this paper we present the analog CMOS architecture of a Multi Layer Perceptron network
with on-chip stochastic Back Propagation learning. The learning algorithm is based on a …

Analog circuit for synapse neural networks VLSI implementation

H Chible - ICECS 2000. 7th IEEE International Conference on …, 2000 - ieeexplore.ieee.org
In this paper the author presents an analog VLSI circuit to implement the synapse operation
in artificial neural network systems. This circuit is a two-quadrant (or four-quadrant) analog …

[PDF][PDF] Design and analog VLSI implementation of artificial neural network

BD Yammenavar, VR Gurunaik… - … Journal of Artificial …, 2011 - researchgate.net
Nature has evolved highly advanced systems capable of performing complex computations,
adoption and learning using analog computations. Furthermore nature has evolved …

Simulation of four-quadrant four transistors synapse analog multiplier

H Chiblé - International Journal of Modelling and Simulation, 2015 - Taylor & Francis
In this paper, a new implementation of CMOS four-quadrant analogue synapse multiplier
circuit for analogue signal processing will be proposed. Especially, it can be used for multi …

Experimental results of an analog VLSI multiplier/synapse/transconductance circuit

H Chible - International Journal of Modelling and Simulation, 2004 - Taylor & Francis
The author presents a fabricated analog VLSI circuit that can be used as a four-quadrant
analog multiplier with high linearity on both terms of multiplication and wide range on one of …

[PDF][PDF] Analog multiplier for feed forward neural network signal processing

H CHIBLÉ, MEH JOUNI, B Hassan-Beirut - Synapse, 2010 - researchgate.net
In this paper, a new implementation of Four-Quadrant CMOS Analog Multiplier Circuit for
feed forward neural networks multi layer perceptron operation will be proposed. The …

[PDF][PDF] OTANPS synapse linear relation multiplier circuit

H Chiblé - Lebanese Science Journal, 2008 - academia.edu
In this paper, a four quadrant VLSI analog multiplier will be proposed, in order to be used in
the implementation of the neurons and synapses modules of the artificial neural networks …

A self-learning analog neural processor

GM Bo, DD Caviglia, M Valle - IEICE transactions on fundamentals …, 2002 - search.ieice.org
In this paper we present the analog architecture and the implementation of an on-chip
learning Multi Layer Perceptron network. The learning algorithm is based on Back …

[PDF][PDF] Different mathematical relations with CMOS VLSI circuits

H Chiblè, A Ghandour - Lebanese Science Journal, 2007 - academia.edu
In this paper, Analog VLSI CMOS circuits that implements different mathematical functions,
equations, or relations such as “Addition, Subtraction, Multiplier, Quadratic, Square Root …