Keystone: An open framework for architecting trusted execution environments

D Lee, D Kohlbrenner, S Shinde, K Asanović… - Proceedings of the …, 2020 - dl.acm.org
Trusted execution environments (TEEs) see rising use in devices from embedded sensors to
cloud servers and encompass a range of cost, power constraints, and security threat model …

Mi6: Secure enclaves in a speculative out-of-order processor

T Bourgeat, I Lebedev, A Wright, S Zhang… - Proceedings of the …, 2019 - dl.acm.org
Recent attacks have broken process isolation by exploiting microarchitectural side channels
that allow indirect access to shared microarchitectural state. Enclaves strengthen the …

Enabling rack-scale confidential computing using heterogeneous trusted execution environment

J Zhu, R Hou, XF Wang, W Wang, J Cao… - … IEEE Symposium on …, 2020 - ieeexplore.ieee.org
With its huge real-world demands, large-scale confidential computing still cannot be
supported by today's Trusted Execution Environment (TEE), due to the lack of scalable and …

[PDF][PDF] Keystone: A framework for architecting tees

D Lee, D Kohlbrenner, S Shinde, D Song… - arXiv preprint arXiv …, 2019 - academia.edu
Trusted execution environments (TEEs) are becoming a requirement across a wide range of
platforms, from embedded sensors to cloud servers, which encompass a wide range of cost …

Side-channel attacks on risc-v processors: Current progress, challenges, and opportunities

MM Ahmadi, F Khalid, M Shafique - arXiv preprint arXiv:2106.08877, 2021 - arxiv.org
Side-channel attacks on microprocessors, like the RISC-V, exhibit security vulnerabilities
that lead to several design challenges. Hence, it is imperative to study and analyze these …

Cerberus: A formal approach to secure and efficient enclave memory sharing

D Lee, K Cheang, A Thomas, C Lu… - Proceedings of the …, 2022 - dl.acm.org
Hardware enclaves rely on a disjoint memory model, which maps each physical address to
an enclave to achieve strong memory isolation. However, this severely limits the …

Citadel: Side-Channel-Resistant Enclaves with Secure Shared Memory on a Speculative Out-of-Order Processor

J Drean, M Gomez-Garcia, T Bourgeat… - arXiv preprint arXiv …, 2023 - arxiv.org
We present Citadel, to our knowledge, the first side-channel-resistant enclave platform to run
realistic secure programs on a speculative out-of-order multicore processor. First, we …

Itus: A secure risc-v system-on-chip

VBY Kumar, A Chattopadhyay… - 2019 32nd IEEE …, 2019 - ieeexplore.ieee.org
The rising tide of attacks, in the recent years, against microprocessors and the system-on-
chip (SoC) space as a whole, has led to a growing number of studies into security of SoCs …

Metal: An Open Architecture for Developing Processor Features

S Zhao, AJ Mashtizadeh - Proceedings of the 19th Workshop on Hot …, 2023 - dl.acm.org
In recent years, an increasing number of hardware devices started providing programming
interfaces to developers such as smart NICs. Processor vendors use microcode to extend …

Trusted Computing on Modern Platforms: Analysis, Challenges, and Implications

M Schneider - 2024 - research-collection.ethz.ch
Computing architectures come in all forms and shapes, and they impact our daily lives
significantly. Smartphones are omnipresent, most jobs require daily interactions with …