Memory module decoder

JR Bhakta, JC Solomon - US Patent 7,619,912, 2009 - Google Patents
A memory module connectable to a computer system includes a printed circuit board, a
plurality of memory devices coupled to the printed circuit board, and a logic element coupled …

Selective replication of data structures

GA Bouchard, DA Carlson, RE Kessler - US Patent 7,558,925, 2009 - Google Patents
Related US Application Data(74) Attorney, Agent, or Firm—Hamilton, Brook, Smith & (63)
Continuation-in-part of application No. 1 1/221,365, Reynolds, PC filed on Sep. 7, 2005, now …

System and method utilizing distributed byte-wise buffers on a memory module

H Lee, JR Bhakta - US Patent 8,516,185, 2013 - Google Patents
A memory system and method utilizing one or more memory modules is provided. The
memory module includes a plurality of memory devices and a controller configured to …

Memory module with a circuit providing load isolation and memory domain translation

JC Solomon, JR Bhakta - US Patent 7,636,274, 2009 - Google Patents
(57) ABSTRACT A memory module includes a plurality of memory devices and a circuit.
Each memory device has a corresponding load. The circuit is electrically coupled to the …

Circuit providing load isolation and memory domain translation for memory module

JC Solomon, JR Bhakta - US Patent 7,916,574, 2011 - Google Patents
(57) ABSTRACT A circuit is configured to be mounted on a memory module connectable to a
computer system so as to be electrically coupled to a plurality of memory devices on the …

Circuit providing load isolation and memory domain translation for memory module

JC Solomon, JR Bhakta - US Patent 7,881,150, 2011 - Google Patents
(57) ABSTRACT A circuit is con? gured to be mounted on a memory module so as to be
electrically coupled to a plurality of double-data-rate (DDR) memory devices arranged in …

Address mapping for system memory

J Van Lunteren - US Patent 6,381,668, 2002 - Google Patents
Background In data processing Systems, addresses as used in programs are usually virtual
addresses which do not reflect where in Systems memory the respective information is …

Multirank DDR memory modual with load reduction

JR Bhakta, JC Solomon - US Patent 8,756,364, 2014 - Google Patents
Related US. Application Data OTHER PUBLICATIONS (63) continuation Of application
NO'13/154,172> _? 1eq0n International Search Report and Written Opinion …

Circuit for memory module

JC Solomon, JR Bhakta - US Patent 8,081,536, 2011 - Google Patents
(57) ABSTRACT A circuit is configured to be mounted on a memory module configured to be
operationally coupled to a computer system. The memory module has a first number of ranks …

System and method of increasing addressable memory space on a memory board

H Lee, JR Bhakta - US Patent 8,417,870, 2013 - Google Patents
A load-reducing memory module includes a plurality of memory components such as
DRAMs. The memory components are organized into sets or ranks such that they can be …