In recent years, it has been witnessed that the systolic array is a successful architecture for
DNN hardware accelerators. However, the design of systolic arrays also encountered many …

While systolic array architectures have the potential to deliver tremendous performance, it is
notoriously challenging to customize an efficient systolic array processor for a target …

Practical deployment of convolutional neural network (CNN) and cryptography algorithm on
constrained devices are challenging due to the huge computation and memory requirement …

Deep convolutional neural networks (CNNs) have achieved remarkable performance at the
cost of huge computation. As the CNN models become more complex and deeper …

Tensor algebra finds applications in various domains, and these applications, especially
when accelerated on spatial hardware accelerators, can deliver high performance and low …

Fast and resource-efficient inference in artificial neural networks (ANNs) is of utmost
importance and drives many new developments in the area of new hardware architectures …

The systolic array is frequently used in accelerators for neural networks, including
Transformer models that have recently achieved remarkable progress in natural language …

Tensor algebra finds applications in various domains, including machine learning
applications, data analytics, and others. Spatial hardware accelerators are widely used to …

Most research in quantum computing today is performed against simulations of quantum
computers rather than true quantum computers. Simulating a quantum computer entails …

This paper presents a survey of functional programming languages in System-on-a-Chip
(SoC) design. The motivation is improving the design productivity by better source code …