Sargantana: A 1 GHz+ in-order RISC-V processor with SIMD vector extensions in 22nm FD-SOI
V Soria-Pardos, M Doblas… - 2022 25th Euromicro …, 2022 - ieeexplore.ieee.org
The RISC-V open Instruction Set Architecture (ISA) has proven to be a solid alternative to
licensed ISAs. In the past 5 years, a plethora of industrial and academic cores and …
licensed ISAs. In the past 5 years, a plethora of industrial and academic cores and …
A high-performance out-of-order soft processor without register renaming
S Mitsuno, J Kadomoto, T Koizumi… - … Conference on Field …, 2020 - ieeexplore.ieee.org
Owing to the growth of FPGA-based systems and the increasing complexity of applications,
the demand for high-performance soft processors in FPGAs has increased. The performance …
the demand for high-performance soft processors in FPGAs has increased. The performance …
Edge GPU based on an FPGA Overlay Architecture using PYNQ
HGM Hernandez, F Fricke, M Al Kadi… - 2022 35th SBC …, 2022 - ieeexplore.ieee.org
Using Graphical Processing Units (GPUs) to accelerate applications such as Deep Neural
Networks (DNNs) or image processing tasks has been gaining lots of attention for some time …
Networks (DNNs) or image processing tasks has been gaining lots of attention for some time …
High Performance Computing via Improvement of Random Forest Algorithm Using Compression and Parallelization Techniques
N Mohammad Karimi, M Ghasemzadeh… - … -i Muhandisi-i Barq …, 2021 - ijece.saminatech.ir
This research seeks to promote one of the widely being used algorithms in machine
learning, known as the random forest algorithm. For this purpose, we use compression and …
learning, known as the random forest algorithm. For this purpose, we use compression and …