A specialized processing block for a programmable logic device includes circuitry for
performing multiplications and sums thereof, as well as circuitry for rounding the result. The …

(57) ABSTRACT A specialized processing block for a programmable logic device
incorporates a fundamental processing unit that per forms a sum of two multiplications …

A specialized processing block in a programmable integrated circuit device is configurable
to perform floating-point arithmetic operations at selectable different precisions. The …

A plurality of specialized processing blocks in a programmable logic device, including
multipliers and circuitry for adding results of those multipliers, can be configured as a larger …

(56) References Cited 5,636,150 A 6/1997 Okamoto 5,636,368 A 6/1997 Harrison et al. US
PATENT DOCUMENTS 5,640,578 A 6/1997 Balmer et al. 5,644,519 A 7, 1997 Yatim et al …

Multiplier-accumulator circuitry includes circuitry for form ing a plurality of partial products of
multiplier and multipli candinputs, carry-save adder circuitry for adding together the partial …

A specialized processing block for a programmable logic device includes circuitry for
performing multiplications and sums thereof, as well as circuitry for performing floating point …

The resources needed—particularly in a programmable device—when carrying out a mixed-
precision multiplication-based floating-point operation (ie, multiplication or division) is …

(57) ABSTRACT A specialized processing block on a programmable inte grated circuit
device includes a first floating-point arithmetic operator stage, and a floating-point adder …

(57) ABSTRACT A programmable integrated circuit device includes a plurality of specialized
processing blocks. Each specialized process ing block may be small enough to occupy a …