An Electrical–Thermal Co-Simulation Model of Chiplet Heterogeneous Integration Systems

X Ma, Q Xu, C Wang, H Cao, J Liu… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Chiplet heterogeneous integration (CHI) is one of the important technology choices to
continue Moore's law. However, due to the characteristics of high power and low supply …

A Wafer-Scale heterogeneous integration thermal simulator

Q Xu, C Wang, Z Li, D Zhang, X Ma, H Cao… - Applied Thermal …, 2025 - Elsevier
The resurgence of wafer-scale heterogeneous integration necessitates efficient simulation
methodologies to enable thermal-aware design space exploration, particularly for iteration …

RapidChiplet: A Toolchain for Rapid Design Space Exploration of Chiplet Architectures

P Iff, B Bruggmann, M Besta, L Benini… - arXiv preprint arXiv …, 2023 - arxiv.org
Chiplet architectures are a promising paradigm to overcome the scaling challenges of
monolithic chips. Chiplets offer heterogeneity, modularity, and cost-effectiveness. The …

[HTML][HTML] Applying the carbon materials in TSVs array for enhancing heat transfer performance of three-dimensional integrated circuits

P Xu, H Huang, S Zhao, X Liu, F Zou, C Li, J Ai… - Case Studies in Thermal …, 2024 - Elsevier
This paper proposed the carbon materials (including MLGNR, MWCNT and SWCNT) to
replace the traditional Cu as the filler of through silicon via (TSV) for enhancing heat transfer …

Transient Electromagnetic–Thermal Co-Simulation of Microwave/RF Integrated Circuits by the HIE-FDTD Method

K Niu, W Zhang, M Li, X Ren, Y Li… - IEEE Transactions …, 2024 - ieeexplore.ieee.org
In this article, we present an efficient transient electromagnetic–thermal co-simulation solver
based on the hybrid implicit–explicit finite-difference time-domain (HIE-FDTD) method. This …

On Task Mapping in Multi-chiplet Based Many-core Systems to Optimize Inter-and Intra-chiplet Communications

X Wang, Y Wang, Y Jiang… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Multi-chiplet system design, by integrating multiple chiplets/dielets within a single package,
has emerged as a promising paradigm in the post-Moore era. This paper introduces a novel …

A Multiscale Anisotropic Thermal Model of Chiplet Heterogeneous Integration System

C Wang, Q Xu, C Nie, H Cao, J Liu… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Due to a variety of limitations on the system-on-chip (SoC), the microelectronics industry is
now facing challenges and making slow progress in recent years. With architecture design …

MATTER: Multi-stage Adaptive Thermal Trojan for Efficiency & Resilience degradation

M Elahi, MR Elshamy, AH Badawy, M Fazeli… - arXiv preprint arXiv …, 2024 - arxiv.org
As mobile systems become more advanced, the security of System-on-Chips (SoCs) is
increasingly threatened by thermal attacks. This research introduces a new attack method …

Layout Dependence Stress Investigation in through Glass via Interposer Architecture Using a Submodeling Simulation Technique and a Factorial Design Approach

SH Wang, W Hsu, YY Liou, PC Huang, CC Lee - Micromachines, 2023 - mdpi.com
The multi-chiplet technique is expected to be a promising solution to achieve high-density
system integration with low power consumption and high usage ratio. This technique can be …