mGDI based parallel adder for low power applications

GS Smitha, HV Ravish Aradhya - Microsystem Technologies, 2019 - Springer
The paper discusses a unique method to design low power circuits, which is called Gate
Diffusion Input (GDI) method. Complex functions can be implemented using only two …

Area and timing analysis of advanced adders under changing technologies

A Raghunandan, HVR Aradhya - 2019 4th International …, 2019 - ieeexplore.ieee.org
A good VLSI Design is one with low area occupancy and high speed of operation. As per
Moore's law the number of transistors on a chip, increase and so does the overall chip Area …

Analysis of carry skip adder with ripple carry adder performance using VHDL language

K Mohithsaicharan, P Jagadeesh - AIP Conference Proceedings, 2024 - pubs.aip.org
A high-speed adder's size and speed may be cut in half if it were converted from an RCA to
a CLA. Instruments and processes: In order to reduce the size and increase the speed of the …

Performance analysis of carry look ahead adder with ripple carry adder using VHDL language

K Mohithsaicharan, P Jagadeesh - AIP Conference Proceedings, 2024 - pubs.aip.org
Swapping out Ripple Carry Adders (RCAs) with Carry Look-Ahead adders (CLAs) is one
architectural possibility for fast adders. This move could result in a smaller adder with …

Pipelined adders for ultralow-power wearables

M Jhamb, T Dhall, T Verma… - Turkish Journal of …, 2019 - journals.tubitak.gov.tr
For continuous real-time monitoring of personal health, wearable devices are indispensable.
The constraintsof cost, power consumption, and limited device dimensions are the critical …

Performance metrics on ultra low power polyphase decimation filter using carbon nanotube field effect transistor technology

N Mathan, M Vadivel… - International Journal of …, 2018 - inderscienceonline.com
Low power consumption and abatement in area are the most pre-eminent criteria to scheme
the digital signal processor. Multi-rate signal processing studies digital signal processing …

Design and implementation of low power mitchell algorithm based logarithmic multiplier

HV Ranjitha, KS Pooja… - 2017 2nd IEEE …, 2017 - ieeexplore.ieee.org
Multiplication is a significant operation in signal processing but slow and complex leading to
high power consumption and area. Digital Signal Processing repetitively uses multiplication …

[引用][C] Optimal contract pricing of load aggregators for direct load control in smart distribution systems

M JHAMB, T DHALL, T VERMA, P Hinduja - Turkish Journal of Electrical Engineering and …