Dimm-link: Enabling efficient inter-dimm communication for near-memory processing
DIMM-based near-memory processing architectures (DIMM-NMP) have received growing
interest from both academia and industry. They have the advantages of large memory …
interest from both academia and industry. They have the advantages of large memory …
Flatflash: Exploiting the byte-accessibility of ssds within a unified memory-storage hierarchy
Using flash-based solid state drives (SSDs) as main memory has been proposed as a
practical solution towards scaling memory capacity for data-intensive applications. However …
practical solution towards scaling memory capacity for data-intensive applications. However …
Exploiting new interconnect technologies in on-chip communication
The continuing scaling of transistors has increased the number of cores available in current
processors, and the number of cores is expected to continue to increase. In such many core …
processors, and the number of cores is expected to continue to increase. In such many core …
Scalable memory fabric for silicon interposer-based multi-core systems
Three-dimensional (3D) integration is considered as a solution to overcome capacity,
bandwidth, and performance limitations of memories. However, due to thermal challenges …
bandwidth, and performance limitations of memories. However, due to thermal challenges …
Minimizing DRAM rank switching overhead for improved timing bounds and performance
L Ecco, A Kostrzewa, R Ernst - 2016 28th Euromicro …, 2016 - ieeexplore.ieee.org
Multi-rank DRAM modules have been identified as a flexible option for accommodating large
mixed critical workloads. However, because all ranks in a module share the same multi-drop …
mixed critical workloads. However, because all ranks in a module share the same multi-drop …
A unified memory network architecture for in-memory computing in commodity servers
In-memory computing is emerging as a promising paradigm in commodity servers to
accelerate data-intensive processing by striving to keep the entire dataset in DRAM. To …
accelerate data-intensive processing by striving to keep the entire dataset in DRAM. To …
RAMON: region-aware memory controller
Recent implementations of heterogeneous multicore systems [central processing unit (CPU),
graphics processing unit (GPU), and hybrid] address the issue of communication latency …
graphics processing unit (GPU), and hybrid] address the issue of communication latency …
Utilizing radio-frequency interconnect for a many-DIMM DRAM system
K Therdsteerasukdi, GS Byun, J Ir… - IEEE Journal on …, 2012 - ieeexplore.ieee.org
The demand for capacity and off-chip bandwidth to dynamic random-access memory
(DRAM) will continue to grow as we integrate more cores onto a die. However, as the data …
(DRAM) will continue to grow as we integrate more cores onto a die. However, as the data …
RFiof: An RF approach to I/O-pin and memory controller scalability for of f-chip memories
MD Marino - Proceedings of the ACM International Conference on …, 2013 - dl.acm.org
Given the maintenance of Moore's law behavior, core count is expected to continue growing,
which keeps demanding more memory bandwidth destined to feed them. Memory controller …
which keeps demanding more memory bandwidth destined to feed them. Memory controller …
[图书][B] Data placement for efficient main memory access
K Sudan - 2013 - search.proquest.com
The main memory system is a critical component of modern computer systems. Dynamic
Random Access Memory (DRAM) based memory designs dominate the industry due to …
Random Access Memory (DRAM) based memory designs dominate the industry due to …