R Sasanka, A Das, JJ Cook, J Bobba… - US Patent …, 2015 - Google Patents
(57) Systems, apparatuses, and methods for a hardware and Soft ware system to automatically decompose a program into mul tiple parallel threads are described. For …
T Fraichard - Proc. of the IEEE Int. Conf. on Robotics and Automation, 1991 - Citeseer
This paper aims at studying the trajectory planning for a car| ie a non holonomic vehicle whose turning radius is lower bounded| in a static and structured world. As for the structure …
Thread-Level Speculation (TLS) overcomes limitations intrinsic with conservative compile- time auto-parallelizing tools by extracting parallel threads optimistically and only ensuring …
G Diamos - Center for Experimental Research in Computer …, 2009 - Citeseer
Ocelot is a dynamic compilation framework designed to map the explicitly parallel PTX execution model used by NVIDIA CUDA applications onto diverse many-core architectures …
Improving sequential performance of out-of-order processors is becoming harder. Further improvements may require exploitation of thread-level parallelism, on top of ILP, as it can …
DJ Sager, R Sasanka, R Gabor, S Raikin… - US Patent …, 2020 - Google Patents
Abstract Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program into multiple parallel threads are described. In some …
Previously, compiler transformations have primarily focused on minimizing program execution time. This thesis explores some examples of applying compiler technology …